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80333 Datasheet(PDF) 27 Page - Intel Corporation

Part # 80333
Description  I/O Processor
PDF  75 Pages
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

80333 Datasheet(HTML) 27 Page - Intel Corporation

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80333
Datasheet
Intel® 80333 I/O Processor Datasheet
May 2005
Order Number: 305433, Revision: 002
27
GPIO[4]/
U1_RXD
1I/O
General Purpose I/O: These pins may be selected on a per pin
basis as general purpose inputs or outputs. The default mode is a
general purpose input.
Serial Input: Serial data input from device pin to receive shift register.
GPIO[5]/
U1_TXD
1I/O
General Purpose I/O: These pins may be selected on a per pin
basis as general purpose inputs or outputs. The default mode is a
general purpose input.
Serial Output: Composite serial data output to the communications
link-peripheral, modem, or data set. The TXD signal is set to the
MARKING (logic 1) state upon a Reset operation.
GPIO[6]/
U1_CTS#
1I/O
General Purpose I/O: These pins may be selected on a per pin
basis as general purpose inputs or outputs. The default mode is a
general purpose input.
Clear To Send: When low, this pin indicates that the receiving UART
is ready to receive data. When the receiving UART deasserts CTS#
high, the transmitting UART should stop transmission to prevent
overflow of the receiving UARTs buffer. The CTS# signal is a modem-
status input whose condition may be tested by the host processor or
by the UART when in Autoflow Mode as described below:
Non-Autoflow Mode:
When not in Autoflow Mode, bit 4 (CTS) of the Modem Status
register (MSR) indicates the state of CTS#. Bit 4 is the complement
of the CTS# signal. Bit 0 (DCTS) of the Modem Status register
indicates whether the CTS# input has changed state since the
previous reading of the Modem Status register. CTS# has no effect
on the transmitter. The user may program the UART to interrupt the
processor when DCTS changes state. The programmer may then
stall the outgoing data stream by starving the transmit FIFO or
disabling the UART with the IER register.
Note:
When UART transmission is stalled by disabling the UART,
the user may not receive an MSR interrupt when CTS#
reasserts. This occurs because disabling the UART also
disables interrupts. As a workaround, the user may use
Auto CTS in Autoflow Mode, or program the CTS# pin to
interrupt.
Autoflow Mode:
Note:
In Autoflow Mode, the UART Transmit circuitry will check
the state of CTS# before transmitting each byte. When
CTS# is high, no data is transmitted.
GPIO[7]/
U1_RTS#
1I/O
General Purpose I/O: These pins may be selected on a per pin
basis as general purpose inputs or outputs. The default mode is a
general purpose input.
Request To Send: When low, this informs the remote device that
the UART is ready to receive data. A reset operation sets this signal
to its Inactive (high) state. LOOP mode operation holds this signal in
its Inactive state.
Non-Autoflow Mode:
The RTS# output signal may be asserted by setting bit 1 (RTS) of
the Modem Control register to a 1. The RTS bit is the complement
of the RTS# signal.
Autoflow Mode:
RTS# is automatically asserted by the Autoflow circuitry when the
Receive buffer exceeds its programmed threshold. It is deasserted
when enough bytes are removed from the buffer to lower the data
level back to the threshold.
Total
8
Table 12.
UART Signals (Sheet 2 of 2)
Name
Count
Type
Description



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