80333 datasheet(3/75 Pages) INTEL

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80333

Datasheet

Intel® 80333 I/O Processor Datasheet

July 2005

Order Number: 305433, Revision: 003US

Contents

1.0

Introduction.................................................................................................................................... 7

1.1

About This Document ........................................................................................................... 7

1.1.1

Terminology ............................................................................................................. 7

1.1.2

Other Relevant Documents ..................................................................................... 8

1.2

About the Intel® 80333 I/O Processor................................................................................... 9

2.0

Features........................................................................................................................................ 11

2.1

Intel XScale® Core .............................................................................................................. 11

2.2

PCI Express*-to-PCI Bridge Units ...................................................................................... 11

2.3

Address Translation Unit ....................................................................................................12

2.4

Memory Controller .............................................................................................................. 12

2.5

Application Accelerator Unit................................................................................................12

2.6

Peripheral Bus Interface .....................................................................................................12

2.7

DMA Controller ...................................................................................................................13

2.8

I2C Bus Interface Unit ......................................................................................................... 13

2.9

Messaging Unit ...................................................................................................................13

2.10

Internal Bus.........................................................................................................................13

2.11

UART Units .........................................................................................................................13

2.12

Interrupt Controller Unit ......................................................................................................14

2.13

GPIO ................................................................................................................................... 14

2.14

SMBus Unit .........................................................................................................................14

3.0

Package Information ...................................................................................................................15

3.1

Functional Signal Descriptions ........................................................................................... 15

3.2

Package Thermal Specifications ........................................................................................ 55

4.0

Electrical Specifications ............................................................................................................. 56

4.1

Absolute Maximum Ratings ................................................................................................ 56

4.2

VCCPLL Pin Requirements...................................................................................................56

4.3

Targeted DC Specifications ................................................................................................ 57

4.4

Targeted AC Specifications ................................................................................................ 59

4.4.1

Clock Signal Timings ............................................................................................. 59

4.4.2

DDR/DDR-II SDRAM Interface Signal Timings...................................................... 61

4.4.3

Peripheral Bus Interface Signal Timings................................................................ 63

4.4.4

I2C/SMBus Interface Signal Timings...................................................................... 65

4.4.5

UART Interface Signal Timings.............................................................................. 65

4.4.6

PCI Express* Differential Transmitter (Tx) Output Specifications.......................... 66

4.4.7

PCI Express* Differential Receiver (Rx) Input Specifications ................................ 67

4.4.8

Boundary Scan Test Signal Timings...................................................................... 68

4.5

AC Timing Waveforms ........................................................................................................ 69

4.6

AC Test Conditions............................................................................................................. 73

Figures

Intel® 80333 I/O Processor Functional Block Diagram ...............................................................10

829-Ball FCBGA Package Diagram............................................................................................ 37

80333 Datasheet(PDF) 3 Page - Intel Corporation

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