R26 datasheet(80/487 Pages) RENESAS

80 / 487 page

R8C/26 Group, R8C/27 Group

7. Programmable I/O Ports

Rev.2.10

Sep 26, 2008

Page 61 of 453

REJ09B0278-0210

Figure 7.9

Pi (i = 0, 1, and 3 to 5) Register

Port Pi Register (i = 0, 1, 3 to 5)

(1, 2, 3)

Symbol

Address

After Reset

00E0h

00h

00E1h

00h

00E5h

00h

00E8h

00h

00E9h

00h

Bit Symbol

Bit Name

Function

NOTES:

Bits P4_0, P4_1, P4_3, and P4_4, in the P4 register are unavailable on this MCU.

If it is necessary to set bits P4_0, P4_1, P4_3, and P4_4, set to 0 (“L” level). When read, the content is 0.

Bits P5_0 to P5_2, P5_5 to P5_7 in the P5 register are unavailable on this MCU.

If it is necessary to set bits P5_0 to P5_2, P5_5 to P5_7, set to 0 (“L” level). When read, the content is 0.

Pi_7

Pi_6

Bits P3_0 and P3_2 in the P3 register are unavailable on this MCU.

If it is necessary to set bits P3_0 and P3_2, set to 0 (“L” level). When read, the content is 0.

b3 b2 b1 b0

Pi_1

Pi_5

Pi_0

Pi_2

Pi_4

Pi_3

b7 b6 b5 b4

Port Pi_0 bit

Port Pi_1 bit

Port Pi_7 bit

Port Pi_5 bit

Port Pi_4 bit

Port Pi_3 bit

Port Pi_6 bit

Port Pi_2 bit

The pin level of any I/O port w hich is set

to input mode can be read by reading the

corresponding bit in this register. The pin

level of any I/O port w hich is set to output

mode can be controlled by w riting to the

corresponding bit in this register.

0 : “L” level

1 : “H” level

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