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UBA2071ATS Datasheet(PDF) 6 Page - NXP Semiconductors |
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UBA2071ATS Datasheet(HTML) 6 Page - NXP Semiconductors |
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6 / 35 page ![]() UBA2071_A_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 23 June 2008 6 of 35 NXP Semiconductors UBA2071; UBA2071A Half bridge control IC for CCFL backlighting 8. Functional description The UBA2071 and UBA2071A are designed to drive a half bridge inverter (as shown in Figure 3) with a resonant load. The load consists typically of a transformer with CCFLs or EEFLs. The IC has an AC lamp current sense input (IFB). It regulates the average absolute value of the lamp current by varying its switching frequency. The load is presumed to be inductive: higher frequency results in lower lamp current. The UBA2071 and UBA2071A include a PWM dimming function. The ICs switch the lamps on and off with a frequency lower than the lamp current frequency but higher than what the human eye can see. The light output of the lamps can be set by setting the ratio of the on-time and off-time. These ICs have several forms of protection and the next chapters will describe each function in more detail. NONFAULT 12 status signal input/output The IC signals a fault condition to external circuits by pulling this pin low. Also external circuits can signal a fault condition to the IC by pulling this pin low. PWMD 13 digital PWM dimming input/output Digital output of internally generated PWM signal if a capacitor is connected to the CPWM pin. Digital input of PWM signal if the CPWM pin is connected to signal ground. Remark: The signal on the PWMD pin is active low, so low voltage on the PWMD pin means lamps are on. PWMA 14 analog PWM dimming input The duty cycle of the internally generated PWM signal is proportional to the voltage on this pin. EN 15 chip enable input A low voltage on this pin will reset and shut down the IC. This pin is also used to select between DC blocking capacitor charging mode and normal operation. VDD 16 supply input A buffer capacitor must be connected between this pin and power ground. PGND 17 power ground return for the low-side driver. GL 18 low-side driver output Gate connection of the low-side power switch. n.c. 19 not connected HV spacer pin. n.c. 20 not connected HV spacer pin. n.c. 21 not connected HV spacer pin. SH 22 high-side source connection Return for high side gate driver. Must be connected to the source of the high-side half bridge power switch. FS 23 floating supply A buffer capacitor must be connected between this pin and the SH pin. This capacitor is charged when the low-side power switch is on and supplies the high-side driver when the high-side power switch is on. GH 24 high-side driver output Gate connection of the high-side half bridge power switch. Table 3. Pin description …continued Symbol Pin Description Function |
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