UBA2071ATS datasheet(9/35 Pages) NXP

9 / 35 page

UBA2071_A_1

Product data sheet

Rev. 01 — 23 June 2008

9 of 35

NXP Semiconductors

UBA2071; UBA2071A

Half bridge control IC for CCFL backlighting

8.5 Non-overlap

During each transition between the two states GL high/GH low and GL low/GH high, GL

and GH will both be low for a ﬁxed time tno (non-overlap time) to allow the half bridge point

to be charged or discharged by the load current (presuming the load always has an

inductive behavior), and thus enabling zero voltage switching, see Figure 5.

8.6 Low-side and high-side drivers

The low-side and high-side drivers are identical. The output of each driver is connected to

the equivalent gate of an external power MOSFET. The high-side driver is supplied by the

bootstrap capacitor, which is charged from the VDD voltage via an internal diode when the

low-side power MOSFETs is on. The low-side driver is directly supplied by the VDD

voltage.

8.7 DC blocking capacitor charging

When the IC is off, either because VVDD is too low, it is disabled via the EN pin, or it

stopped after the time-out period during a fault condition, the low-side power switch

(QLS in Figure 3) is turned on by making GL high. This ensures that the supply buffer

capacitor of the ﬂoating supply (CFS in Figure 3) is fully charged at start-up. As a side

effect the DC blocking capacitor (Cblock in Figure 3) will be completely discharged at

start-up. To prevent large inrush currents during the ﬁrst switching cycles the UBA2071

and UBA2071A can ﬁrst charge the DC blocking capacitor at start-up.

Fig 5.

Oscillator, driver and half bridge voltages

VCF

VCFH

VGH − VSH

VDD

VGL

VDD

VHB

VHV

tno

014aaa102

UBA2071ATS Datasheet(PDF) 9 Page - NXP Semiconductors