UBA2071ATS datasheet(8/35 Pages) NXP

8 / 35 page

UBA2071_A_1

Product data sheet

Rev. 01 — 23 June 2008

8 of 35

NXP Semiconductors

UBA2071; UBA2071A

Half bridge control IC for CCFL backlighting

8.2 VDD clamp

When the UBA2071 is disabled (EN pin low) or in the stop state, the VDD clamp is

activated. The VDD clamp is an internal active zener limiting the voltage to Vclamp(VDD). It

prevents the start-up current source from charging the VDD buffer capacitor to too high a

voltage.

The maximum current that is allowed to be delivered by the start-up current source is

determined by the clamp voltage as stated in Table 6 and the maximum allowed VDD

voltage as stated in Table 4.

The UBA2071A has no VDD clamp.

8.3 Enable

The UBA2071 or UBA2071A can be activated or set to standby via the EN pin. If the

voltage on the EN pin is below Vth(L)(EN), the IC will stop oscillating at the next GL high

state2, and most parts of the internal circuits will shut down. When the EN pin is left open,

it is pulled low by an internal bias current of Ibias(EN).

When the voltage on the EN pin comes above Vth(H)1(EN), the IC will start up in

DC blocking capacitor charging mode (see Section 8.8). When the voltage on the EN pin

goes over Vth(H)2(EN), the IC will start with the initial ignition frequency sweep (see

Section 8.8) and subsequently go to normal operation mode again.

8.4 The oscillator

The UBA2071 and UBA2071A have an internal voltage controlled sawtooth oscillator, see

Figure 5. Its frequency inverses in proportion to the capacitor connected to the CF pin.

The IC switches GL on and GH off during one oscillator period and GL off and GH on

during the next oscillator period. This results in a half bridge voltage with a frequency

(called the switching frequency fsw from here on) of half the oscillator frequency and with a

duty cycle of exactly 50 %.

The oscillator frequency is controlled by changing the charge current at the CF pin. By

changing the frequency the lamp current is controlled. It is also used to limit the

transformer output voltage and for gradually switching the lamps on and off during PWM

dimming.

When both GH and GL are low during the lamps off period of PWM dimming (so PWMD is high), the IC will wait with entering the

standby state until PWMD becomes low again and GL can be made high.

UBA2071ATS Datasheet(PDF) 8 Page - NXP Semiconductors