ADL5502

Rev. A | Page 24 of 28

Table 4. Evaluation Board Configuration Options

Component

Description

Default Condition

VPOS, GND

Ground and Supply Vector Pins.

Not applicable

C13, C14

Power Supply Decoupling. Nominal supply decoupling of 0.01 μF and 100 pF.

C13 = 0.1 μF (Size 0402)

C14 = 100 pF (Size 0402)

C17

Filter Capacitor. The internal rms averaging capacitor can be augmented by placing

additional capacitance in C17.

C17 = 10 nF (Size 0402)

R10, C15, C16

RF Input interface. The 75 Ω resistor at R10 combines with the ADL5502 internal input

impedance to give a broadband input impedance of around 50 Ω. The pads for components

C15, C16, and R10 can be used for more precise matching at a particular frequency.

R10 = 75 Ω (Size 0402)

C15, C16 = 0 Ω (Size 0402)

R3, R6, R11,

R12, C18, C19

Output Filtering. The combination of the internal 100 Ω output resistance and C18 produce

a low-pass filter to reduce output ripple of the VRMS output. Similarly, C19 and the internal

100 Ω output resistance form a low-pass filter at the PEAK output. Either output can be

scaled down using the resistor divider pads, R3, R11, R6, and R12.

R3, R6 = 0 Ω (Size 0402)

R11, R12 = open (Size 0402)

C18, C19 = open (Size 0402)

R1, SW1

Device Enable. When the switch is set toward the SW1 label, the ENBL pin is grounded

(through the 0 Ω resistor) putting the device in power-down mode. In the opposite switch

position, the ENBL pin is connected to VPOS and the ADL5502 is in enable mode. While the

switch is in the disabled position, the ENBL pin can be driven by a signal generator via the

SMA labeled ENBL. In this case, R1 must be removed or changed to provide a 50 Ω match.

R1 = 0 Ω (Size 0402)

SW1 = away from SW1 label

R7, R8, R13,

C20, SW2

Control Interface. When the switch is set toward the SW2 label, the CNTL pin is grounded

(through a 10 kΩ resistor) putting the device in peak-hold mode. In the opposite switch

position, the pin is connected to VPOS (through a 10 kΩ resistor) and the ADL5502 is in

reset mode. While the switch is in the peak-hold position, the CNTL pin can be driven by

a signal generator via the SMA labeled CNTL. In this case, R8 may be removed or changed to

provide a 50 Ω match. R13 and C20 allow for a low-pass filter design for the control pin.

R7, R8 = 10 kΩ (Size 0402)

R13 = 0 Ω (Size 0402)

C20 = Open (Size 0402)

SW2 = away from SW1 label

R2, R4, R5,

R9, C11, C12

Alternate Interface. The end connector, P1, allows access to various ADL5502 signals.

These signal paths are only used during factory test and characterization.

R2, R4, R5, R9 = 0 Ω (Size 0402)

C11 = 0.1 μF (Size 0402)

C12 = 100 pF (Size 0402)