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ADP5042 Datasheet(PDF) 7 Page - Analog Devices

Part # ADP5042
Description  Micro PMU with 0.8 A Buck, Two 300 mA LDOs Supervisory, Watchdog and Manual Reset
PDF  32 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADP5042 Datasheet(HTML) 7 Page - Analog Devices

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ADP5042
Rev. 0 | Page 7 of 32
ABSOLUTE MAXIMUM RATINGS
Table 6.
Parameter
Rating
AVIN, VINx, VOUTx, ENx, MODE, MR
−0.3 V to +6 V
, WDIx,
WMOD, WSTAT, nRSTO to GND
Storage Temperature Range
−65°C to +150°C
Operating Junction Temperature Range
−40°C to +125°C
Soldering Conditions
JEDEC J-STD-020
ESD Human Body Model
3000 V
ESD Charged Device Model
1500 V
ESD Machine Model
100 V
Stresses above those listed under absolute maximum ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL DATA
Absolute maximum ratings apply individually only, not in
combination.
The ADP5042 can be damaged when the junction temperature
limits are exceeded. Monitoring ambient temperature does not
guarantee that the junction temperature is within the specified
temperature limits. In applications with high power dissipation
and poor thermal resistance, the maximum ambient
temperature may have to be derated. In applications with
moderate power dissipation and low PCB thermal resistance,
the maximum ambient temperature can exceed the maximum
limit as long as the junction temperature is within specification
limits. The junction temperature of the device is dependent on
the ambient temperature, the power dissipation of the device
(PD), and the junction-to-ambient thermal resistance of the
package. Maximum junction temperature is calculated from the
ambient temperature and power dissipation using the formula
TJ = TA + (PD × θJA)
Junction-to-ambient thermal resistance (θJA) of the package is
based on modeling and calculation using a 4-layer board. The
junction-to-ambient thermal resistance is highly dependent on
the application and board layout. In applications where high
maximum power dissipation exists, close attention to thermal
board design is required. The value of θJA may vary, depending on
PCB material, layout, and environmental conditions. The specified
value of θJA is based on a four-layer, 4” × 3”, 2.5 oz copper board,
as per JEDEC standard. For additional information, see the
AN-772 Application Note, A Design and Manufacturing Guide
for the Lead Frame Chip Scale (LFCSP).
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 7. Thermal Resistance
Package Type
θ
JA
θ
JC
Unit
20-Lead, 0.5 mm pitch LFCSP
38
4.2
°C/W
ESD CAUTION



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