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CYUSB3014 Datasheet(PDF) 11 Page - Cypress Semiconductor |
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CYUSB3014 Datasheet(HTML) 11 Page - Cypress Semiconductor |
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11 / 38 page ![]() PRELIMINARY CYUSB3014 Document Number 001-52136 Rev. *H Page 11 of 38 Suspend Mode with USB 3.0 PHY Disabled (L2) ■ The power consumption in this mode does not exceed ISB2 ■ USB 3.0 PHY is disabled and the USB interface is in suspend mode ■ The clocks are shut off. The PLLs are disabled ■ All I/Os maintain their previous state ■ USB interface maintains the previous state ■ Power supply for the wakeup source and core power must be retained. All other power domains can be turned on/off individually ■ The states of the configuration registers, buffer memory and all internal RAM are maintained ■ All transactions must be completed before EZ-USB FX3 enters Suspend mode (state of outstanding transac- tions are not preserved) ■ The firmware resumes operation from where it was suspended (except when woken up by RESET# assertion) because the program counter does not reset ■ Firmware executing on ARM926EJ-S core can put EZ-USB FX3 into suspend mode. For example, on USB suspend condition, firmware may decide to put EZ-USB FX3 into suspend mode ■ External Processor, through the use of mailbox registers can put EZ-USB FX3 into suspend mode ■ D+ transitioning to low or high ■ D- transitioning to low or high ■ Impedance change on OTG_ID pin ■ Resume condition on SSRX +/- ■ Detection of VBUS ■ Level detect on UART_CTS (programmable polarity) ■ GPIF II interface assertion of CTL[0] ■ Assertion of RESET# Table 6. Entry and Exit Methods for Low Power Modes (continued) Low Power Mode Characteristics Methods of Entry Methods of Exit [+] Feedback [+] Feedback |
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