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INA826 Datasheet(PDF) 18 Page - Texas Instruments |
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INA826 Datasheet(HTML) 18 Page - Texas Instruments |
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18 / 40 page ![]() G=1+ 49.4k W R G INA826 SBOS562B – AUGUST 2011 – REVISED DECEMBER 2011 www.ti.com SETTING THE GAIN Gain of the INA826 is set by a single external resistor, RG, connected between pins 2 and 3. The value of RG is selected according to Equation 1: (1) Table 1 lists several commonly-used gains and resistor values. The 49.4-k Ω term in Equation 1 comes from the sum of the two internal 24.7-k Ω feedback resistors. These on-chip resistors are laser-trimmed to accurate absolute values. The accuracy and temperature coefficients of these resistors are included in the gain accuracy and drift specifications of the INA826. Table 1. Commonly-Used Gains and Resistor Values DESIRED GAIN (V/V) RG (Ω) NEAREST 1% RG (Ω) 1 — — 2 49.4k 49.9k 5 12.35k 12.4k 10 5.489k 5.49k 20 2.600k 2.61k 50 1.008k 1k 100 499 499 200 248 249 500 99 100 1000 49.5 49.9 Gain Drift The stability and temperature drift of the external gain setting resistor, RG, also affects gain. The contribution of RG to gain accuracy and drift can be directly inferred from the gain of Equation 1. The best gain drift of 1 ppm/ ℃ can be achieved when the INA826 uses G = 1 without RG connected. In this case, the gain drift is limited only by the slight mismatch of the temperature coefficient of the integrated 50-k Ω resistors in the differential amplifier (A3). At G greater than 1, the gain drift increases as a result of the individual drift of the 24.7-k Ω resistors in the feedback of A1 and A2, relative to the drift of the external gain resistor RG. Process improvements of the temperature coefficient of the feedback resistors now make it possible to specify a maximum gain drift of the feedback resistors of 35 ppm/ ℃, thus significantly improving the overall temperature stability of applications using gains greater than 1. Low resistor values required for high gain can make wiring resistance important. Sockets add to the wiring resistance and contribute additional gain error (such as a possible unstable gain error) at gains of approximately 100 or greater. To ensure stability, avoid parasitic capacitance of more than a few picofarads at RG connections. Careful matching of any parasitics on both RG pins maintains optimal CMRR over frequency; see Typical Characteristics curves (Figure 19 and Figure 20). 18 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): INA826 |
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