SN11113 spec

19

START and STOP conditions shown below are the exception.

Every two wire series bus

transaction begins from a START, and ends with a STOP, or another START (repeated START).

The figure below demonstrates a typical two wire series bus transaction.

After every 8 bits sent

by the transmitter, the receiver should send one bit low for positive acknowledgement or one bit

high for negative acknowledgement.

After the negative acknowledgement, a STOP or repeated

START should follow.

The next figure shows more detailed about acknowledgement bit.

Note that ‘SCL’ is always driven by the master.