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RM48L540 Datasheet(PDF) 90 Page - Texas Instruments |
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RM48L540 Datasheet(HTML) 90 Page - Texas Instruments |
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90 / 152 page  RM48L940 RM48L740 RM48L540 SPNS175 – SEPTEMBER 2011 www.ti.com Table 4-31. Interrupt Request Assignments (continued) Modules Interrupt Sources Default VIM Interrupt Channel Ethernet C0_RX_PULSE 79 HWAG1 HWA_INT_REQ_H 80 HWAG2 HWA_INT_REQ_H 81 DCC1 DCC done interrupt 82 Reserved Reserved 84-87 HWAG1 HWA_INT_REQ_L 88 HWAG2 HWA_INT_REQ_L 89 Reserved Reserved 90-95 NOTE Address location 0x00000000 in the VIM RAM is reserved for the phantom interrupt ISR entry; therefore only request channels 0..94 can be used and are offset by 1 address in the VIM RAM. NOTE The lower-order interrupt channels are higher priority channels than the higher-order interrupt channels. NOTE The application can change the mapping of interrupt sources to the interrupt channels via the interrupt channel control registers (CHANCTRLx) inside the VIM module. 90 System Information and Electrical Specifications Copyright © 2011, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: RM48L940 RM48L740 RM48L540 |
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