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RM48L540 Datasheet(PDF) 95 Page - Texas Instruments

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Part # RM48L540
Description  RM48Lx40 16/32-Bit RISC Flash Microcontroller
PDF  152 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

RM48L540 Datasheet(HTML) 95 Page - Texas Instruments

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RM48L940
RM48L740
RM48L540
www.ti.com
SPNS175
– SEPTEMBER 2011
4.18 Error Signaling Module
The Error Signaling Module (ESM) manages the various error conditions on the RM4x microcontroller. The
error condition is handled based on a fixed severity level assigned to it. Any severe error condition can be
configured to drive a low level on a dedicated device terminal called nERROR. This can be used as an
indicator to an external monitor circuit to put the system into a safe state.
4.18.1 Features
The features of the Error Signaling Module are:
•
128 interrupt/error channels are supported, divided into 3 different groups
– 64 channels with maskable interrupt and configurable error pin behavior
– 32 error channels with non-maskable interrupt and predefined error pin behavior
– 32 channels with predefined error pin behavior only
•
Error pin to signal severe device failure
•
Configurable timebase for error signal
•
Error forcing capability
4.18.2 ESM Channel Assignments
The Error Signaling Module (ESM) integrates all the device error conditions and groups them in the order
of severity. Group1 is used for errors of the lowest severity while Group3 is used for errors of the highest
severity. The device response to each error is determined by the severity group it is connected to.
Table 4-35 shows the channel assignment for each group.
Table 4-34. ESM Groups
ERROR GROUP
INTERRUPT CHARACTERISTICS
INFLUENCE ON ERROR PIN
Group1
maskable, low or high priority
configurable
Group2
non-maskable, high priority
fixed
Group3
no interrupt generated
fixed
Table 4-35. ESM Channel Assignments
ERROR SOURCES
GROUP
CHANNELS
Reserved
Group1
0
MibADC2 - parity
Group1
1
DMA - MPU
Group1
2
DMA - parity
Group1
3
Reserved
Group1
4
DMA - imprecise read error
Group1
5
FMC - correctable error: bus1 and bus2 interfaces
Group1
6
(does not include accesses to EEPROM bank)
N2HET1/N2HET2 - parity
Group1
7
HET TU1/HET TU2 - parity
Group1
8
HET TU1/HET TU2 - MPU
Group1
9
PLL - Slip
Group1
10
Clock Monitor - interrupt
Group1
11
Reserved
Group1
12
DMA - imprecise write error
Group1
13
Reserved
Group1
14
VIM RAM - parity
Group1
15
Reserved
Group1
16
MibSPI1 - parity
Group1
17
Copyright
© 2011, Texas Instruments Incorporated
System Information and Electrical Specifications
95
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