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S29CD032J Datasheet(PDF) 46 Page - SPANSION

Part # S29CD032J
Description  32/16 Megabit CMOS 2.6 Volt or 3.3 Volt-Only Simultaneous Read/Write, Dual Boot, Burst Mode Flash Memory with VersatileI/O?
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S29CD-J and S29CL-J Flash Family
S29CD-J_CL-J_00_B7 October 11, 2012
Da ta
Sh e e t
9.2.1
Programming PPB
The PPB Program Command is used to program, or set, a given PPB. The first three cycles in the PPB
Program Command are standard unlock cycles. The fourth cycle in the PPB Program Command executes the
pulse which programs the specified PPB. The user must wait either 100 µs or until DQ6 stops toggling before
executing the fifth cycle, which is the read verify portion of the PPB Program Command. The sixth cycle
outputs the status of the PPB Program operation.
In the event that the program PPB operation was not successful, the user can loop directly to the fourth cycle
of the PPB Program Command to perform the program pulse and read verification again. After four
unsuccessful loops through the program pulse and read verification cycles the PPB programming operation
should be considered a failure.
Figure 9.2 PPB Program Operation
9.2.2
Erasing PPB
The All PPB Erase command is used to erase all the PPBs in bulk. There are no means for individually
erasing a specific PPB. The first three cycles of the PPB Erase command are standard unlock cycles. The
fourth cycle executes the erase pulse to all the PPBs. The user must wait either 20 ms or until DQ6 stops
toggling before executing the fifth cycle, which is the read verify portion of the PPB Erase Command. The
sixth cycle outputs the status of the PPB Erase operation.
In the event that the erase PPB operation was not successful, the user can loop directly to the fourth cycle of
the All PPB Erase Command to perform the erase pulse and read verification again. After four unsuccessful
loops through the erase pulse and read verification cycles, the PPB erasing operation should be considered a
failure.
Note
 All PPB must be preprogrammed prior to issuing the All PPB Erase Command.
Either poll DQ6 in the
small bank and wait for
it to stop toggling OR
wait 100
µs
DQ0 = 1?
Write 0x68 to SG+WP
Write 0x48 to SG+WP
Read from SG+WP
YES
NO
YES
NO
Done
Error
Write 0xAA to 0x555
Write 0x55 to 0x2AA
Write 0x60 to 0x555
5th attempt?
Note: Reads from the
small bank at this point
return the status of the
operation, not read array
data.



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