LPC81XM datasheet(21/67 Pages) NXP

21 / 67 page

LPC81xM

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Objective data sheet

Rev. 1.0 — 7 November 2012

21 of 67

NXP Semiconductors

LPC81xM

32-bit ARM Cortex-M0+ microcontroller

7.19.1 Features

• Selectable 0 mV, 10 mV ( 5 mV), and 20 mV ( 10 mV), 40 mV ( 20 mV) input

hysteresis.

• Two selectable external voltages (VDD or VDDCMP on pin PIO0_6); fully configurable

on either positive or negative input channel.

• Internal voltage reference from band gap and temperature sensor selectable on either

positive or negative input channel.

• 32-stage voltage ladder with the internal reference voltage selectable on either the

positive or the negative input channel.

• Voltage ladder source voltage is selectable from an external pin or the main 3.3 V

supply voltage rail.

• Voltage ladder can be separately powered down for applications only requiring the

comparator function.

• Interrupt output is connected to NVIC.

• Comparator level output is connected to output pin ACMP_O.

• The comparator output can be routed internally to the SCT input through the switch

matrix.

Fig 8.

Comparator block diagram

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