LPC81XM datasheet(46/67 Pages) NXP

46 / 67 page

LPC81xM

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Objective data sheet

Rev. 1.0 — 7 November 2012

46 of 67

NXP Semiconductors

LPC81xM

32-bit ARM Cortex-M0+ microcontroller

11.6 I2C-bus

[1]

See the I2C-bus specification UM10204 for details.

[2]

Parameters are valid over operating temperature range unless otherwise specified.

[3]

tHD;DAT is the data hold time that is measured from the falling edge of SCL; applies to data in transmission

and the acknowledge.

[4]

A device must internally provide a hold time of at least 300 ns for the SDA signal (with respect to the

VIH(min) of the SCL signal) to bridge the undefined region of the falling edge of SCL.

[5]

Cb = total capacitance of one bus line in pF.

[6]

The maximum tf for the SDA and SCL bus lines is specified at 300 ns. The maximum fall time for the SDA

output stage tf is specified at 250 ns. This allows series protection resistors to be connected in between the

SDA and the SCL pins and the SDA/SCL bus lines without exceeding the maximum specified tf.

[7]

In Fast-mode Plus, fall time is specified the same for both output stage and bus timing. If series resistors

are used, designers should allow for this when considering bus timing.

Table 17.

Dynamic characteristic: I2C-bus pins[1]

Tamb = 40 C to +85 C.[2]

Symbol

Parameter

Conditions

Min

Max

Unit

fSCL

SCL clock

frequency

Standard-mode

100

kHz

Fast-mode

400

kHz

Fast-mode Plus; on

pins PIO0_10 and

PIO0_11

MHz

fall time

[4][5][6][7]

of both SDA and

SCL signals

Standard-mode

300

Fast-mode

20 + 0.1

 C

300

Fast-mode Plus;

on pins PIO0_10

and PIO0_11

120

tLOW

LOW period of

the SCL clock

Standard-mode

4.7

s

Fast-mode

1.3

s

Fast-mode Plus; on

pins PIO0_10 and

PIO0_11

0.5

s

tHIGH

HIGH period of

the SCL clock

Standard-mode

4.0

s

Fast-mode

0.6

s

Fast-mode Plus; on

pins PIO0_10 and

PIO0_11

0.26

s

tHD;DAT

data hold time

[3][4][8]

Standard-mode

s

Fast-mode

s

Fast-mode Plus; on

pins PIO0_10 and

PIO0_11

s

tSU;DAT

data set-up

time

[9][10]

Standard-mode

250

Fast-mode

100

Fast-mode Plus; on

pins PIO0_10 and

PIO0_11

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