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WM8310 Datasheet(PDF) 144 Page - Wolfson Microelectronics plc |
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WM8310 Datasheet(HTML) 144 Page - Wolfson Microelectronics plc |
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144 / 291 page ![]() WM8310 Pre-Production w PP, May 2012, Rev 3.1 144 ADDRESS BIT LABEL DESCRIPTION Default value is 1 (masked) 4 IM_OTP_INT Interrupt mask. 0 = Do not mask interrupt. 1 = Mask interrupt. Default value is 1 (masked) 2 IM_CHG_INT Interrupt mask. 0 = Do not mask interrupt. 1 = Mask interrupt. Default value is 1 (masked) 1 IM_HC_INT Interrupt mask. 0 = Do not mask interrupt. 1 = Mask interrupt. Default value is 1 (masked) 0 IM_UV_INT Interrupt mask. 0 = Do not mask interrupt. 1 = Mask interrupt. Default value is 1 (masked) Table 85 Primary Interrupt Status and Mask Bits 23.2 SECONDARY INTERRUPTS The following sections define the secondary interrupt status and control bits associated with each of the primary interrupt bits defined in Table 85. 23.2.1 POWER STATE INTERRUPT The primary PS_INT interrupt comprises three secondary interrupts as described in Section 11.4. The secondary interrupt bits are defined in Table 86. Each of the secondary interrupts can be masked. When a mask bit is set, the corresponding interrupt event is masked and does not trigger a PS_INT interrupt. The secondary interrupt bits in R16402 (4012h) are valid regardless of whether the mask bit is set. The secondary interrupts are all masked by default. ADDRESS BIT LABEL DESCRIPTION R16402 (4012h) Interrupt Status 2 2 PS_POR_EINT Power On Reset interrupt (Rising Edge triggered) Note: Cleared when a ‘1’ is written. 1 PS_SLEEP_OFF_EINT SLEEP or OFF interrupt (Rising Edge triggered) Note: Cleared when a ‘1’ is written. 0 PS_ON_WAKE_EINT ON or WAKE interrupt (Rising Edge triggered) Note: Cleared when a ‘1’ is written. R16410 (401Ah) Interrupt Status 2 Mask 2 IM_PS_POR_EINT Interrupt mask. 0 = Do not mask interrupt. 1 = Mask interrupt. Default value is 1 (masked) 1 IM_PS_SLEEP_OFF_EINT Interrupt mask. 0 = Do not mask interrupt. 1 = Mask interrupt. Default value is 1 (masked) 0 IM_PS_ON_WAKE_EINT Interrupt mask. 0 = Do not mask interrupt. 1 = Mask interrupt. Default value is 1 (masked) Table 86 Power State Interrupts |
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