WM8351 datasheet(106/330 Pages) WOLFSON

106 / 330 page

WM8351

Production Data

PD, April 2012, Rev 4.5

106

HIBERNATE

ACTIVE

BACKUP

ZERO

VRTC < POR threshold

LINE < UVLO level

LINE > UVLO level

VRTC > POR threshold

(from any state)

LINE < (VRTC + 50mV)

(from any state)

LINE < shutdown threshold

OR clock failure

ON event

AND LINE > startup threshold

ON event

OFF event

OFF

Startup

Fault

pre-active

startup

sequencing

HIBERNATE=1

in R5

Figure 64 WM8351 Operating State Diagram

14.2.1

HIBERNATE STATE SELECTION

The WM8351 moves from the ACTIVE to the HIBERNATE state when the HIBERNATE register bit is

set. It can also move to hibernate using the Hibernate Edge or the Hibernate Level function from the

GPIOs.

It returns to the ACTIVE state when the Hibernate Level GPIO function is reset and the HIBERNATE

bit is set to 0. It can also return to ACTIVE via the Hibernate Edge function or when a wake-up event

(see Section 14.3.1) occurs.

If a fault condition occurs in the HIBERNATE state, the WM8351 moves to the OFF state.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R5 (05h)

System

Hibernate

HIBERNATE

Determines what state the chip should

operate in.

0 = Active state

1 = Hibernate state

The register bit defaults to 0 when a reset

happens

Table 55 Invoking HIBERNATE State

The behaviour of the WM8351 in the HIBERNATE state is programmable in terms of supply voltage

generation, interrupts and resets. Fast battery charging is disabled in the HIBERNATE state, but

trickle charging is possible.

WM8351 Datasheet(PDF) 106 Page - Wolfson Microelectronics plc

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