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WM8351 Datasheet(PDF) 231 Page - Wolfson Microelectronics plc |
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WM8351 Datasheet(HTML) 231 Page - Wolfson Microelectronics plc |
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231 / 330 page  Production Data WM8351 w PD, April 2012, Rev 4.5 231 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO 6:4 RTC_PINT[2:0] 010 Selects frequency of periodic interrupt output pulse (32kHz period duration) as shown below. When set time status is high, the periodic output is disabled. 000 = disabled 001 = 1 sec 010 = 1 min 011 = 1 hour 100 = 1 day 101 = 1 month 11x = disabled 3:0 RTC_DSW[3:0] 0000 Divided Square wave select. 0000 = disabled 0001 = 1Hz 0010 = 2Hz … 1011 = 1024Hz 1100 = 2048Hz 1101 = 4096Hz 1110 = 8192Hz 1111 = 16384Hz Note: due to trim settings for crystal intolerances a single square wave period during seconds rollover may be decrease its on time period or increase its off time period by up to 8 32kHz periods. Register 17h RTC Time Control REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO R24 (18h) System Interrupts 13 OC_INT 0 First-level over-current interrupt. Note: This bit is cleared once read. 12 UV_INT 0 First-level under-voltage interrupt. Note: This bit is cleared once read. 9 CS_INT 0 First-level current sink interrupt. Note: This bit is cleared once read. 8 EXT_INT 0 First-level external interrupt. Note: This bit is cleared once read. 7 CODEC_INT 0 First-level codec interrupt. Note: This bit is cleared once read. 6 GP_INT 0 First-level GPIO interrupt. Note: This bit is cleared once read. 5 AUXADC_INT 0 First-level AUXADC comparator interrupt. Note: This bit is cleared once read. 4 RTC_INT 0 First-level RTC interrupt. Note: This bit is cleared once read. 3 SYS_INT 0 First-level system interrupt. Note: This bit is cleared once read. 2 CHG_INT 0 First-level charger interrupt. Note: This bit is cleared once read. 1 USB_INT 0 First-level USB interrupt. Note: This bit is cleared once read. 0 WKUP_INT 0 First-level wakeup interrupt. Note: This bit is cleared once read. Register 18h System Interrupts |
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