WM8352 datasheet(42/336 Pages) WOLFSON

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WM8352

Production Data

PD, February 2011, Rev 4.4

11.4 3-WIRE SERIAL CONTROL MODE

The 3-wire control interface uses the CSB, SCLK and SDATA pins, which are referenced to the

digital buffer supply, DBVDD. (In 3-wire mode, CSB is provided on GPIO7.)

3-wire control mode is selected by setting SPI_3WIRE = 1 and SPI_4WIRE = 0.

In 3-wire control mode, a control word consists of 24 bits. The first bit is the read/write bit (R/W),

which is followed by 7 address bits (A6 to A0) that determine which control register is accessed. The

remaining 16 bits (B15 to B0) are data bits, corresponding to the 16 bits in each control register.

In 3-wire mode, every rising edge of SCLK clocks in one data bit from the SDATA pin. A rising edge

on CSB latches in a complete control word consisting of the last 24 bits.

In Write operations (R/W=0), all SDATA bits are driven by the controlling device.

In Read operations (R/W=1), the SDATA pin is driven by the controlling device to clock in the register

address, after which the WM8352 drives the SDATA pin to output the applicable data bits.

Similarly to 2-wire control mode, the WM8352 transmits logic 1 by tri-stating the SDATA pin, rather

than pulling it high. An external pull-up resistor is required to pull the SDATA line high so that the

logic 1 can be recognised by the master.

The 3-wire control mode timing is illustrated in Figure 30.

Figure 30 3-Wire Serial Control Interface

WM8352 Datasheet(PDF) 42 Page - Wolfson Microelectronics plc