WM8352 datasheet(43/336 Pages) WOLFSON

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WM8352

PD, February 2011, Rev 4.4

11.5 4-WIRE SERIAL CONTROL MODE

The 4-wire control interface uses the CSB, SCLK, SDATA and SDOUT pins, which are referenced to

the digital buffer supply, DBVDD. (In 4-wire mode, SDOUT is provided on GPIO6; CSB is provided

on GPIO7.)

4-wire control mode is selected by setting SPI_3WIRE = 1 and SPI_4WIRE = 1.

The Data Output pin, SDOUT, can be configured as CMOS or Open Drain, as described in Table 1.

In CMOS mode, SDOUT is driven low when not outputting register data bits. In Open Drain mode,

SDOUT is undriven when not outputting register data bits.

In Write operations (R/W=0), this mode is the same as 3-wire mode described above.

In Read operations (R/W=1), the SDATA pin is ignored following receipt of the valid register address.

SDOUT is driven by the WM8352.

The 4-wire control mode timing is illustrated in Figure 31 and Figure 32.

R/W

SDATA

SCLK

CSB

control register address

control register data bits (READ/WRITE)

SDOUT

B15

B14

B13

B12

B11

B10

B15

B14

B13

B12

B11

B10

Figure 31 4-Wire Readback (CMOS)

SDATA

SCLK

CSB

control register address

control register data bits (READ/WRITE)

SDOUT

undriven

B15

B14

B13

B12

B11

B10

B15

B14

B13

B12

B11

B10

R/W

Figure 32 4-Wire Readback (Open Drain)

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