WM8352 datasheet(308/336 Pages) WOLFSON

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WM8352

Production Data

PD, February 2011, Rev 4.4

308

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R205 (CDh)

LDO2 Low

Power

13:12

LDO2_HIB_MODE[1:0]

LDO2 Hibernate behaviour:

00 = Select voltage image settings

01 = disable output

10 = reserved

11 = reserved

Reset by state machine. Default held in metal

mask.

9:8

LDO2_HIB_TRIG[1:0]

LDO2 Hibernate signal select

00 = Hibernate register bit

01 = L_PWR1

10 = L_PWR2

11 = L_PWR3

Reset by state machine. Default held in metal

mask.

4:0

LDO2_VIMG[4:0]

1_1100

LDO2 Regulator output image voltage

1 1111 = 3.3V

… (100mV steps)

1 0000 = 1.8V

0 1111 = 1.65V

… (50mV steps)

0 0000 = 0.9V

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R206 (CEh)

LDO3

Control

LDO3_SWI

LDO3 Regulator mode

0 = LDO voltage regulator

1 = Current-limited switch (no voltage regulation,

LDO3_VSEL has no effect)

Reset by state machine. Default held in metal mask.

LDO3_OPFLT

Enable discharge of LDO3 outputs when LDO3 is

disabled

0 = Enabled - Output to be discharged

1 = Disabled - Output is left floating

Note - if LDO Regulators 1, 2, 3 and 4 are all

disabled, then the outputs will all be discharged,

regardless of the LDOn_OPFLT bit.

4:0

LDO3_VSEL[4:0]

1_1011

1_1111

1_1100

0_0110

LDO3 Regulator output voltage (when LDO3_SWI=0)

1 1111 = 3.3V

… (100mV steps)

1 0000 = 1.8V

0 1111 = 1.65V

… (50mV steps)

0 0000 = 0.9V

Reset by state machine. Default held in metal mask.

WM8352 Datasheet(PDF) 308 Page - Wolfson Microelectronics plc

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