CY8C54LP datasheet(74/117 Pages) CYPRESS

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PRELIMINARY

PSoC® 5LP: CY8C54LP Family

Datasheet

Document Number: 001-84934 Rev. **

Page 74 of 117

11.4.3 USBIO

For operation in GPIO mode, the standard range for VDDD applies, see Device Level Specifications on page 63.

Table 11-13. USBIO DC Specifications

Parameter

Description

Conditions

Min

Typ

Max

Units

Rusbi

USB D+ pull-up resistance

With idle bus

0.900

–

1.575

Rusba

USB D+ pull-up resistance

While receiving traffic

1.425

–

3.090

Vohusb

Static output high

15 k

Ω ±5% to Vss, internal pull-up

enabled

2.8

–

3.6

Volusb

Static output low

15 k

Ω ±5% to Vss, internal pull-up

enabled

––

0.3

Vihgpio

Input voltage high, GPIO mode

VDDD = 1.8 V

1.5

–

VDDD = 3.3 V

–

VDDD = 5.0 V

–

Vilgpio

Input voltage low, GPIO mode

VDDD = 1.8 V

–

0.8

VDDD = 3.3 V

–

0.8

VDDD = 5.0 V

–

0.8

Vohgpio

Output voltage high, GPIO mode

IOH = 4 mA, VDDD = 1.8 V

1.6

–

IOH = 4 mA, VDDD = 3.3 V

3.1

–

IOH = 4 mA, VDDD = 5.0 V

4.2

–

Volgpio

Output voltage low, GPIO mode

IOL = 4 mA, VDDD = 1.8 V

–

0.3

IOL = 4 mA, VDDD = 3.3 V

–

0.3

IOL = 4 mA, VDDD = 5.0 V

–

0.3

Vdi

Differential input sensitivity

|(D+)–(D–)|

–

0.2

Vcm

Differential input common mode range

0.8

–

2.5

Vse

Single ended receiver threshold

0.8

–

Rps2

PS/2 pull-up resistance

In PS/2 mode, with PS/2 pull-up

enabled

3–

Rext

External USB series resistor

In series with each USB pin

21.78

(–1%)

22.22

(+1%)

USB driver output impedance

Including Rext

–

CIN

USB transceiver input capacitance

–

IIL[33]

Input leakage current (absolute value) 25 °C, VDDD = 3.0 V

–

Note

33. Based on device characterization (Not production tested).

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