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ADV7191 Datasheet(PDF) 28 Page - Analog Devices |
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ADV7191 Datasheet(HTML) 28 Page - Analog Devices |
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28 / 69 page  ADV7190/ADV7191 –28– REV. 0 REGISTER ACCESSES The MPU can write to or read from all of the registers of the ADV7190/ADV7191 with the exception of the Subaddress Regis- ters, which are write-only registers. The Subaddress Register determines which register the next read or write operation ac- cesses. All communications with the part through the bus start with an access to the Subaddress Register. Then a read/write operation is performed from/to the target address which then increments to the next address until a stop command on the bus is performed. REGISTER PROGRAMMING The following section describes each register. All registers can be read from as well as written to. ADDRESS SR6 SR5 SR4 SR3 SR2 SR1 SR0 00H 0 0 0 0 0 0 0 MODE REGISTER 0 01H 0 0 0 0 0 0 1 MODE REGISTER 1 02H 0 0 0 0 0 1 0 MODE REGISTER 2 03H 0 0 0 0 0 1 1 MODE REGISTER 3 04H 0 0 0 0 1 0 0 MODE REGISTER 4 05H 0 0 0 0 1 0 1 MODE REGISTER 5 06H 0 0 0 0 1 1 0 MODE REGISTER 6 07H 0 0 0 0 1 1 1 MODE REGISTER 7 08H 0 0 0 1 0 0 0 MODE REGISTER 8 09H 0 0 0 1 0 0 1 MODE REGISTER 9 0AH 0 0 0 1 0 1 0 TIMING REGISTER 0 0BH 0 0 0 1 0 1 1 TIMING REGISTER 1 0CH 0 0 0 1 1 0 0 SUBCARRIER FREQUENCY REGISTER 0 0DH 0 0 0 1 1 0 1 SUBCARRIER FREQUENCY REGISTER 1 0EH 0 0 0 1 1 1 0 SUBCARRIER FREQUENCY REGISTER 2 0FH 0 0 0 1 1 1 1 SUBCARRIER FREQUENCY REGISTER 3 10H 0 0 1 0 0 0 0 SUBCARRIER PHASE REGISTER 11H 0 0 1 0 0 0 1 CLOSED CAPTIONING EXTENDED DATA BYTE 0 12H 0 0 1 0 0 1 0 CLOSED CAPTIONING EXTENDED DATA BYTE 1 13H 0 0 1 0 0 1 1 CLOSED CAPTIONING DATA BYTE 0 14H 0 0 1 0 1 0 0 CLOSED CAPTIONING DATA BYTE 1 15H 0 0 1 0 1 0 1 NTSC PEDESTAL/TELETEXT CONTROL REGISTER 0 16H 0 0 1 0 1 1 0 NTSC PEDESTAL/TELETEXT CONTROL REGISTER 1 17H 0 0 1 0 1 1 1 NTSC PEDESTAL/TELETEXT CONTROL REGISTER 2 18H 0 0 1 1 0 0 0 NTSC PEDESTAL/TELETEXT CONTROL REGISTER 3 19H 0 0 1 1 0 0 1 CGMS/WSS 0 1AH 0 0 1 1 0 1 0 CGMS/WSS 1 1BH 0 0 1 1 0 1 1 CGMS/WSS 2 1CH 0 0 1 1 1 0 0 TELETEXT REQUEST CONTROL REGISTER 1DH 0 0 1 1 1 0 1 CONTRAST CONTROL REGISTER 1EH 0 0 1 1 1 1 0 U SCALE 1FH 0 0 1 1 1 1 1 V SCALE 20H 0 1 0 0 0 0 0 HUE ADJUST CONTROL REGISTER 21H 0 1 0 0 0 0 1 BRIGHTNESS CONTROL REGISTER 22H 0 1 0 0 0 1 0 SHARPNESS CONTROL REGISTER 23H 0 1 0 0 0 1 1 DNR 0 24H 0 1 0 0 1 0 0 DNR 1 25H 0 1 0 0 1 0 1 DNR 2 26H 0 1 0 0 1 1 0 GAMMA CORRECTION REGISTER 0 27H 0 1 0 0 1 1 1 GAMMA CORRECTION REGISTER 1 28H 0 1 0 1 0 0 0 GAMMA CORRECTION REGISTER 2 29H 0 1 0 1 0 0 1 GAMMA CORRECTION REGISTER 3 2AH 0 1 0 1 0 1 0 GAMMA CORRECTION REGISTER 4 2BH 0 1 0 1 0 1 1 GAMMA CORRECTION REGISTER 5 2CH 0 1 0 1 1 0 0 GAMMA CORRECTION REGISTER 6 2DH 0 1 0 1 1 0 1 GAMMA CORRECTION REGISTER 7 2EH 0 1 0 1 1 1 0 GAMMA CORRECTION REGISTER 8 2FH 0 1 0 1 1 1 1 GAMMA CORRECTION REGISTER 9 30H 0 1 1 0 0 0 0 GAMMA CORRECTION REGISTER 10 31H 0 1 1 0 0 0 1 GAMMA CORRECTION REGISTER 11 32H 0 1 1 0 0 1 0 GAMMA CORRECTION REGISTER 12 33H 0 1 1 0 0 1 1 GAMMA CORRECTION REGISTER 13 34H 0 1 1 0 1 0 0 BRIGHTNESS DETECT REGISTER 35H 0 1 1 0 1 0 1 OUTPUT CLOCK REGISTER 36H 0 1 1 0 1 1 0 RESERVED 37H 0 1 1 0 1 1 1 RESERVED 38H 0 1 1 1 0 0 0 RESERVED 39H 0 1 1 1 0 0 1 RESERVED 3AH 0 1 1 1 0 1 0 MACROVISION REGISTER 3BH 0 1 1 1 0 1 1 MACROVISION REGISTER 3CH 0 1 1 1 1 0 0 MACROVISION REGISTER 3DH 0 1 1 1 1 0 1 MACROVISION REGISTER 3EH 0 1 1 1 1 1 0 MACROVISION REGISTER 3FH 1 1 1 1 1 1 1 MACROVISION REGISTER 40H 1 0 0 0 0 0 0 MACROVISION REGISTER 41H 1 0 0 0 0 0 1 MACROVISION REGISTER 42H 1 0 0 0 0 1 0 MACROVISION REGISTER 43H 1 0 0 0 0 1 1 MACROVISION REGISTER 44H 1 0 0 0 1 0 0 MACROVISION REGISTER 45H 1 0 0 0 1 0 1 MACROVISION REGISTER 46H 1 0 0 0 1 1 0 MACROVISION REGISTER 47H 1 0 0 1 1 1 1 MACROVISION REGISTER 48H 1 0 0 1 0 1 0 MACROVISION REGISTER 49H 1 0 0 1 0 0 1 MACROVISION REGISTER 4AH 1 0 0 1 0 0 0 MACROVISION REGISTER 4BH 1 0 0 1 0 1 1 MACROVISION REGISTER ADV7190/ADV7191 SUBADDRESS REGISTER SR7 SR6 SR5 SR4 SR3 SR2 SR1 SR0 SR7 ZERO SHOULD BE WRITTEN HERE Figure 49. Subaddress Register Subaddress Register (SR7–SR0) The Communications Register is an eight bit write-only register. After the part has been accessed over the bus and a read/write operation is selected, the subaddress is set up. The Subaddress Register determines to/from which register the operation takes place. Figure 49 shows the various operations under the control of the Subaddress Register 0 should always be written to SR7. Register Select (SR6–SR0) These bits are set up to point to the required starting address. |
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