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LP38798 Datasheet(PDF) 15 Page - Texas Instruments |
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LP38798 Datasheet(HTML) 15 Page - Texas Instruments |
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15 / 23 page ![]() LP38798 www.ti.com SNOSCT6A – MARCH 2013 – REVISED MAY 2013 Noise Filter Any noise at LP38798 SET pin is reduced by an internal passive, first order low-pass RC filter before it is passed to the output buffer stage. The low-pass filter has a -3dB cut-off frequency of approximately 0.08Hz. To keep the low-pass filter from interfering with the output voltage rise time at start-up, a voltage comparator keeps the filter in a fast-charge mode while the output voltage (VOUT) is less than 99.5% of the SET pin voltage (VSET) . When the rising VOUT is within 0.5% of VSET the fast-charge mode ends, and VOUT will rise the final 0.5% based on the RC time constant ( τ = 2s) of the filter. Should VOUT be more than 2% above the VSET voltage, a voltage comparator will put the filter into the fast-charge mode to allow the filter to discharge and VOUT to fall a value closer to VSET. When the falling VOUT is within 2% of VSET the fast-charge mode ends, and VOUT will fall the final 2% based on the RC time constant (τ = 2s) of the filter. If the input voltage has an extended rise time, the output voltage may exhibit a stair-case waveform as the fast- charge mode is activated and de-activated as VSET rises with VIN, and VOUT follows. Once the VIN has risen above the programmed VSET voltage, and VOUT is within 0.5% of VSET, the stair-case behavior will end. Enable Input Operation The Enable pin (EN) is pulled high internally by a 2 μA (typical) current source from the IN pin, and internally clamped at 5V (typical) by a zener. Pulling the EN pin low, by sinking the IEN current to ground, will turn the output off. If the EN function is not needed the EN pin should be left open (floating). Do not connect the EN pin directly to VIN if there is any possibility that VIN might exceed 5.5V (i.e. EN pin AbsMax). If external pull-up is required, the external current into the EN pin should be limited to no more than 10 μA. RPULL-UP > ( VPULL-UP - 5V) / 10 μA ) (6) Thermal Shutdown The LP38798 includes thermal protection that will shut-off the output current when activated by excessive device dissipation. Thermal shutdown (TSD) will occur when the junction temperature has risen to 170°C. The junction temperature must fall typically 12°C for the output current to be restored. Junction temperature is calculated from the following formula: TJ = (TA + ( PD x θJ-A)) (7) Where the power being dissipated, PD, is defined as: PD = ((VIN - VOUT) x IOUT) (8) Note that Thermal Shutdown is provided as a safety feature and is outside the specified Operating Ratings temperature range. Operation with a junction temperature (TJ) above 125°C is not recommended as the device behavior is not specified. 12-Lead WSON Package Thermal Considerations The value of θJ−A for the 12-lead WSON package is specifically dependent on PCB copper area, copper thickness, the number of layers, and thermal vias under the exposed thermal pad (DAP). Please refer to AN- 1520 (Literature Number: SNVA183A) for general guidelines for mounting packages with exposed thermal pads. Exceeding the maximum allowable power dissipation defined by the final θJ−A will cause excessive die temperature, and the regulator may go into thermal shutdown. Mounting the 12-lead WSON Package The 12-Lead WSON package requires specific mounting techniques that are detailed in Texas Instruments Application Note # 1187 (Literature Number: SNOA401Q). Referring to the section PCB Design Recommendations in AN-1187, it should be noted that the pad style that should be used with the WSON DNT0012B package is the NSMD (non-solder mask defined) type. Additionally, it is recommended the PCB terminal pads to be 0.2 mm longer than the package pads to create a solder fillet to improve reliability and inspection. Copyright © 2013, Texas Instruments Incorporated 15 Product Folder Links: LP38798 |
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