OP196 datasheet(63/88 Pages) AD

63 / 88 page

ADuC841/ADuC842/ADuC843

Rev. 0 | Page 63 of 88

Table 30. T2CON SFR Bit Designations

Bit No.

Name

Description

TF2

Timer 2 Overflow Flag.

Set by hardware on a Timer 2 overflow. TF2 cannot be set when either RCLK = 1 or TCLK = 1.

Cleared by user software.

EXF2

Timer 2 External Flag.

Set by hardware when either a capture or reload is caused by a negative transition on T2EX and EXEN2 = 1.

Cleared by user software.

RCLK

Receive Clock Enable Bit.

Set by the user to enable the serial port to use Timer 2 overflow pulses for its receive clock in serial port Modes 1 and 3.

Cleared by the user to enable Timer 1 overflow to be used for the receive clock.

TCLK

Transmit Clock Enable Bit.

Set by the user to enable the serial port to use Timer 2 overflow pulses for its transmit clock in serial port Modes 1 and 3.

Cleared by the user to enable Timer 1 overflow to be used for the transmit clock.

EXEN2

Timer 2 External Enable Flag.

Set by the user to enable a capture or reload to occur as a result of a negative transition on T2EX if Timer 2 is not being

used to clock the serial port.

Cleared by the user for Timer 2 to ignore events at T2EX.

TR2

Timer 2 Start/Stop Control Bit.

Set by the user to start Timer 2.

Cleared by the user to stop Timer 2.

CNT2

Timer 2 Timer or Counter Function Select Bit.

Set by the user to select counter function (input from external T2 pin).

Cleared by the user to select timer function (input from on-chip core clock).

CAP2

Timer 2 Capture/Reload Select Bit.

Set by the user to enable captures on negative transitions at T2EX if EXEN2 = 1.

Cleared by the user to enable autoreloads with Timer 2 overflows or negative transitions at T2EX when EXEN2 = 1.

When either RCLK = 1 or TCLK = 1, this bit is ignored and the timer is forced to autoreload on Timer 2 overflow.

Timer/Counter 2 Data Registers

Timer/Counter 2 also has two pairs of 8-bit data registers

associated with it. These are used as both timer data registers

and as timer capture/reload registers.

TH2 and TL2

Timer 2, data high byte and low byte.

SFR Address = CDH, CCH, respectively.

RCAP2H and RCAP2L

Timer 2, capture/reload byte and low byte.

SFR Address = CBH, CAH, respectively.

T2CON

Timer/Counter 2 Control Register

SFR Address

C8H

Power-On Default

00H

Bit Addressable

Yes

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