THS1031CPWR datasheet(28/41 Pages) TI

28 / 41 page

THS1031

3-V TO 5.5-V, 10-BIT, 30 MSPS

CMOS ANALOG-TO-DIGITAL CONVERTER

SLAS242E – NOVEMBER 1999 – REVISED MARCH 2002

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

PRINCIPLES OF OPERATION

driving the THS1301 analog inputs

driving AIN

Figure 32 shows an equivalent circuit for the THS1031 AIN pin. The load presented to the system at the AIN

pin comprises the switched input sampling capacitor, CSAMPLE, and various stray capacitances, CP1 and CP2.

8 pF

AVDD

AGND

CLK

1.2 pF

CSAMPLE

VLAST

AIN

Figure 32. Equivalent Circuit of Analog Input AIN

In any single-ended input mode, VLAST = the average of the previously sampled voltage at AIN and the average

of the voltages on pins REFTS and REFBS. In any differential mode, VLAST = the common mode input voltage.

The external source driving AIN must be able to charge and settle into CSAMPLE and the CP1 and CP2 strays

to within 0.5 LSB error while sampling (CLK pin low) to achieve full ADC resolution.

AIN input current and input load modeling

When CLK goes low, the source driving AIN must charge the total switched capacitance CS = CSAMPLE + CP2.

The total charge transferred depends on the voltage at AIN and is given by

CHARGING +

(AIN

* V

LAST

)

For a fixed voltage at AIN, so that AIN and VLAST do not change between samples, the maximum amount of

charge transfer occurs at AIN = FS– (charging current flows out of THS1030) and AIN = FS+ (current flows into

THS1030). If AIN is held at the voltage FS+, VLAST = [(FS+) + VM]/2, giving a maximum transferred charge:

Q(FS)

(FS

)) * [(FS )) ) VM]

S +

[(FS

)) * VM]

+ (1 4 of the input voltage span)

If the input voltage changes between samples, then the maximum possible charge transfer is

Q(max)

+ 3

Q(FS)

which occurs for a full-scale input change (FS+ to FS– or FS– to FS+) between samples.

The charging current pulses can make the AIN source jump or ring, especially if the source is slightly inductive

at high frequencies. Inserting a small series resistor of 20

Ω or less in the input path can damp source ringing.

See Figure 33. This resistor can be made larger than 20

Ω if reduced input bandwidth or distortion performance

is acceptable.

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