TAS5760LD datasheet(22/54 Pages) TI

22 / 54 page

Digital to PWM

Conversion

011010..

Digital

Comparator

Mux

22 Bit Audio Sample in Data Path

20 Bit Digital Clipper Level in Control Port

Digital Clipper

TAS5760LD

SLOS781 – JULY 2013

www.ti.com

DC Blocking Filter

Excessive DC content in the audio signal can damage loudspeakers and even small amounts of DC offset in the

signal path cause cause audible artifacts when muting and unmuting the speaker amplifier. For these reasons,

the amplifier employs two separate DC blocking methods for the speaker amplifier. The first is a high-pass filter

provided at the front of the data path to remove any DC from incoming audio data before it is presented to the

audio path. The -3dB corner frequencies for the filter are specified in the speaker amplifier electrical

characteristics table. In Hardware Control mode, the DC blocking filter is active and cannot be disabled. In

Software Control mode, the filter can be bypassed by writing a 1 to bit 7 of register 0x02. The second method is

a DC detection circuit that will shutdown the power stage and issue a latching fault if DC is found to be present

on the output due to some internal error of the device. This DC Error (DCE) protection is discussed in the

Protection Circuitry section below.

Digital Boost and Volume Control

Following the high-pass filter, a digital boost block is included to provide additional digital gain if required for a

given application as well as to set an appropriate clipping point for a given GAIN[1:0] pin configuration when in

Hardware Control mode. The digital boost block defaults to +6dB when the device is in Hardware Mode. In most

use cases, the digital boost block will remain unchanged when operating the device in Software Control mode, as

the volume control offers sufficient digital gain for most applications. The TAS5760LD's digital volume control

operates from Mute to +24dB, in steps of 0.5dB. The equation below illustrates how to set the 8-bit volume

control register at address 0x04:

spacer

DVC [Hex Value] = 0xCF + (DVC [dB] / 0.5 [dB] )

(1)

spacer

Transitions between volume settings will occur at a rate of 0.5dB every 8 LRCK cycles to ensure no audible

artifacts occur during volume changes. This volume fade feature can be disabled via Bit 7 of the Volume Control

Configuration Register.

Digital Clipper

A digital clipper is integrated in the oversampled domain to provide a component-free method to set the clip point

of the speaker amplifier. Via the "Digital Clipper Level x" controls in the I²C control port, the point at which the

oversampled digital path clips can be set directly, which in turns sets the 10% THD+N operating point of the

amplifier. This is useful for applications in which a single system is designed for use in several end applications

that have different power rating specifications. its place in the oversampled domain ensures that the digital

clipper is acoustically appealing and reduces or eliminates tones which would otherwise foldback into the audio

band

during

clipping

events.

The

block

diagram

the

digital

clipper

shown

below:

Figure 38. Digital Clipper Simplified Block Diagram

As mentioned previously, the audio signature of the amplifier when the digital clipper is active is very smooth,

owing to its place in the signal chain. The typical behavior of the clipping events are shown in the screen shot

below.

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