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TAS5760LD Datasheet(PDF) 3 Page - Texas Instruments |
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TAS5760LD Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 54 page ![]() PowerPAD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 SFT_CLIP ANA_REG VCOM ANA_REF SPK_FAULT SPK_SD FREQ/SDA PBTL/SCL DVDD SPK_GAIN0 SPK_GAIN1 SPK_SLEEP/ADR MCLK SCLK SDIN LRCK DGND DR_INA- DR_INA+ DR_OUTA DRGND DR_MUTE DRVSS DR_CN GVDD_REG GGND AVDD PVDD PVDD BSTRPA+ SPK_OUTA+ PGND SPK_OUTA- BSTRPA- BSTRPB- SPK_OUTB- PGND SPK_OUTB+ BSTRPB+ PVDD PVDD DR_INB- DR_INB+ DR_OUTB DR_UVE DRGND DRVDD DR_CP TAS5760LD www.ti.com SLOS781 – JULY 2013 PINOUT AND PIN DESCRIPTIONS TSSOP PACKAGE DCA-48 (TOP VIEW) Pin Descriptions TAS5760LD Internal No. Type Description Termination Name AVDD 46 P - Power supply for internal analog circuitry ANA_REF 4 P - Connection point for internal reference used by ANA_REG and VCOM filter capacitors. Voltage regulator derived from AVDD supply (NOTE: This terminal is provided as a connection ANA_REG 2 P - point for filtering capacitors for this supply and must not be used to power any external circuitry) Connection point for the SPK_OUTA- bootstrap capacitor, which is used to create a power BSTRPA- 39 P - supply for the high-side gate drive for SPK_OUTA- Connection point for the SPK_OUTA+ bootstrap capacitor, which is used to create a power BSTRPA+ 43 P - supply for the high-side gate drive for SPK_OUTA+ Connection point for the SPK_OUTB- bootstrap capacitor, which is used to create a power BSTRPB- 38 P - supply for the high-side gate drive for SPK_OUTB- Connection point for the SPK_OUTB+ bootstrap capacitor, which is used to create a power BSTRPB+ 34 P - supply for the high-side gate drive for SPK_OUTB+ DGND 17 G - Ground for digital circuitry (NOTE: This terminal should be connected to the system ground) DR_CN 24 P - Negative terminal for capacitor connection used in headphone amplifier/line driver charge pump DR_CP 25 P - Positive terminal for capacitor connection used in headphone amplifier/line driver charge pump DR_INA- 18 AI - Negative differential input for channel A of headphone amplifier/line driver DR_INA+ 19 AI - Positive differential input for channel A of headphone amplifier/line driver DR_INB- 31 AI - Negative differential input for channel B of headphone amplifier/line driver DR_INB+ 30 AI - Positive differential input for channel B of headphone amplifier/line driver DR_MUTE 22 DI - Places the headphone amplifier/line driver in mute DR_OUTA 20 AO - Output for channel A of headphone amplifier/line driver DR_OUTB 29 AO - Output for channel B of headphone amplifier/line driver DR_UVE 28 AI - Sense pin for under-voltage protection circuit for the headphone amplifier/line driver Negative power supply generated by charge pump from the DRVDD supply for ground centered DR_VSS 23 P - headphone/line driver output Ground for headphone amplifier/line driver circuitry (NOTE: This terminal should be connected to DRGND 21 G - the system ground) Copyright © 2013, Texas Instruments Incorporated 3 Product Folder Links: TAS5760LD |
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