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EP3SL70 Datasheet(PDF) 131 Page - Altera Corporation

Part # EP3SL70
Description  Stratix III Device Handbook
PDF  341 Pages
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Manufacturer  ALTERA [Altera Corporation]
Direct Link  http://www.altera.com
Logo ALTERA - Altera Corporation

EP3SL70 Datasheet(HTML) 131 Page - Altera Corporation

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Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
1–121
I/O Timing
© July 2010
Altera Corporation
Stratix III Device Handbook, Volume 2
1.8-V HSTL
CLASS II
GCLK
t
su
-0.917
-0.895
-1.309 -1.453 -1.586 -1.565 -1.896 -1.453 -1.586 -1.565 -1.896
ns
t
h
1.052
1.026
1.491
1.659
1.813
1.782
2.112
1.659
1.813
1.782
2.112
ns
GCLK
PLL
t
su
-1.209
-1.152
-1.678 -1.879 -1.986 -1.910 -2.332 -1.879 -1.986 -1.910 -2.332
ns
t
h
1.489
1.432
2.082
2.331
2.483
2.384
2.819
2.331
2.483
2.384
2.819
ns
1.5-V HSTL
CLASS I
GCLK
t
su
-0.917
-0.895
-1.309 -1.453 -1.586 -1.565 -1.896 -1.453 -1.586 -1.565 -1.896
ns
t
h
1.052
1.026
1.491
1.659
1.813
1.782
2.112
1.659
1.813
1.782
2.112
ns
GCLK
PLL
t
su
-1.209
-1.152
-1.678 -1.879 -1.986 -1.910 -2.332 -1.879 -1.986 -1.910 -2.332
ns
t
h
1.489
1.432
2.082
2.331
2.483
2.384
2.819
2.331
2.483
2.384
2.819
ns
1.5-V HSTL
CLASS II
GCLK
t
su
-0.906
-0.884
-1.298 -1.442 -1.567 -1.546 -1.877 -1.442 -1.567 -1.546 -1.877
ns
t
h
1.041
1.015
1.479
1.648
1.794
1.763
2.093
1.648
1.794
1.763
2.093
ns
GCLK
PLL
t
su
-1.198
-1.141
-1.667 -1.868 -1.967 -1.891 -2.313 -1.868 -1.967 -1.891 -2.313
ns
t
h
1.478
1.421
2.070
2.320
2.464
2.365
2.800
2.320
2.464
2.365
2.800
ns
1.2-V HSTL
CLASS I
GCLK
t
su
-0.906
-0.884
-1.298 -1.442 -1.567 -1.546 -1.877 -1.442 -1.567 -1.546 -1.877
ns
t
h
1.041
1.015
1.479
1.648
1.794
1.763
2.093
1.648
1.794
1.763
2.093
ns
GCLK
PLL
t
su
-1.198
-1.141
-1.667 -1.868 -1.967 -1.891 -2.313 -1.868 -1.967 -1.891 -2.313
ns
t
h
1.478
1.421
2.070
2.320
2.464
2.365
2.800
2.320
2.464
2.365
2.800
ns
1.2-V HSTL
CLASS II
GCLK
t
su
-0.894
-0.872
-1.288 -1.431 -1.551 -1.530 -1.861 -1.431 -1.551 -1.530 -1.861
ns
t
h
1.029
1.003
1.469
1.637
1.778
1.747
2.077
1.637
1.778
1.747
2.077
ns
GCLK
PLL
t
su
-1.186
-1.129
-1.657 -1.857 -1.951 -1.875 -2.297 -1.857 -1.951 -1.875 -2.297
ns
t
h
1.466
1.409
2.060
2.309
2.448
2.349
2.784
2.309
2.448
2.349
2.784
ns
3.0-V PCI
GCLK
t
su
-0.894
-0.872
-1.288 -1.431 -1.551 -1.530 -1.861 -1.431 -1.551 -1.530 -1.861
ns
t
h
1.029
1.003
1.469
1.637
1.778
1.747
2.077
1.637
1.778
1.747
2.077
ns
GCLK
PLL
t
su
-1.186
-1.129
-1.657 -1.857 -1.951 -1.875 -2.297 -1.857 -1.951 -1.875 -2.297
ns
t
h
1.466
1.409
2.060
2.309
2.448
2.349
2.784
2.309
2.448
2.349
2.784
ns
3.0-V
PCI-X
GCLK
t
su
-0.997
-0.975
-1.401 -1.560 -1.796 -1.777 -2.105 -1.560 -1.796 -1.777 -2.105
ns
t
h
1.130
1.104
1.583
1.769
2.026
1.995
2.326
1.769
2.026
1.995
2.326
ns
GCLK
PLL
t
su
-1.289
-1.232
-1.770 -1.986 -2.196 -2.122 -2.541 -1.986 -2.196 -2.122 -2.541
ns
t
h
1.567
1.510
2.174
2.441
2.696
2.597
3.033
2.441
2.696
2.597
3.033
ns
Table 1–71. EP3SL150 Column Pins Input Timing Parameters (Part 3 of 3)
I/O
Standard
Clock
Fast Model
C2
C3
C4
C4L
I3
I4
I4L
Units
Industrial
Commercial
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
0.9 V
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
0.9 V



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