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EP3SL70 Datasheet(PDF) 200 Page - Altera Corporation |
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EP3SL70 Datasheet(HTML) 200 Page - Altera Corporation |
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200 / 341 page  1–190 Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics I/O Timing Stratix III Device Handbook, Volume 2 © July 2010 Altera Corporation 1.8-V HSTL CLASS I 4mA GCLK tco 3.363 3.583 5.262 5.470 6.016 5.875 6.259 5.622 6.143 6.002 6.338 ns GCLK PLL t co 1.406 1.566 2.019 2.134 2.337 2.348 2.367 2.231 2.439 2.444 2.355 ns 6mA GCLK t co 3.356 3.577 5.260 5.469 6.008 5.874 6.251 5.621 6.136 6.002 6.331 ns GCLK PLL tco 1.399 1.560 2.017 2.133 2.329 2.340 2.359 2.230 2.432 2.437 2.348 ns 8mA GCLK t co 3.347 3.569 5.253 5.462 6.000 5.867 6.243 5.614 6.128 5.995 6.323 ns GCLK PLL t co 1.390 1.552 2.010 2.126 2.321 2.332 2.351 2.223 2.424 2.429 2.340 ns 10mA GCLK t co 3.350 3.571 5.256 5.465 6.003 5.871 6.246 5.617 6.131 5.998 6.326 ns GCLK PLL t co 1.393 1.554 2.013 2.129 2.324 2.335 2.354 2.226 2.427 2.432 2.343 ns 12mA GCLK tco 3.346 3.568 5.258 5.468 6.003 5.874 6.246 5.620 6.132 6.003 6.327 ns GCLK PLL t co 1.389 1.551 2.015 2.132 2.324 2.335 2.354 2.229 2.428 2.433 2.344 ns 1.8-V HSTL CLASS II 16mA GCLK t co 3.354 3.576 5.256 5.465 5.994 5.870 6.237 5.616 6.121 5.997 6.316 ns GCLK PLL t co 1.397 1.559 2.013 2.129 2.315 2.326 2.345 2.225 2.417 2.422 2.333 ns 1.5-V HSTL CLASS I 4mA GCLK t co 3.369 3.589 5.271 5.480 6.031 5.888 6.274 5.631 6.157 6.013 6.352 ns GCLK PLL t co 1.412 1.572 2.028 2.144 2.352 2.363 2.382 2.240 2.453 2.458 2.369 ns 6mA GCLK t co 3.363 3.584 5.272 5.482 6.027 5.888 6.270 5.633 6.154 6.016 6.349 ns GCLK PLL t co 1.406 1.567 2.029 2.146 2.348 2.359 2.378 2.242 2.450 2.455 2.366 ns 8mA GCLK tco 3.359 3.580 5.267 5.477 6.021 5.883 6.264 5.628 6.148 6.010 6.343 ns GCLK PLL t co 1.402 1.563 2.024 2.141 2.342 2.353 2.372 2.237 2.444 2.449 2.360 ns 1.2-V HSTL CLASS I 4mA GCLK t co 3.371 3.591 5.284 5.496 6.049 5.906 6.292 5.647 6.174 6.032 6.369 ns GCLK PLL t co 1.414 1.574 2.041 2.160 2.370 2.381 2.400 2.256 2.470 2.475 2.386 ns 6mA GCLK t co 3.362 3.583 5.275 5.487 6.037 5.896 6.280 5.638 6.163 6.023 6.358 ns GCLK PLL t co 1.405 1.566 2.032 2.151 2.358 2.369 2.388 2.247 2.459 2.464 2.375 ns 8mA GCLK t co 3.361 3.583 5.282 5.495 6.043 5.905 6.286 5.647 6.170 6.033 6.365 ns GCLK PLL t co 1.404 1.566 2.039 2.159 2.364 2.375 2.394 2.256 2.466 2.471 2.382 ns 3.0-V PCI — GCLK tco 3.434 3.697 5.330 5.520 6.047 5.904 6.299 5.650 6.177 6.027 6.372 ns GCLK PLL t co 1.517 1.680 2.087 2.196 2.378 2.386 2.387 2.295 2.482 2.493 2.401 ns 3.0-V PCI-X — GCLK t co 3.434 3.697 5.330 5.520 6.047 5.904 6.299 5.650 6.177 6.027 6.372 ns GCLK PLL t co 1.517 1.680 2.087 2.196 2.378 2.386 2.387 2.295 2.482 2.493 2.401 ns Table 1–94. EP3SL340 Row Pins Output Timing Parameters (Part 4 of 4) I/O Standard Clock Fast Model C2 C3 C4 C4L I3 I4 I4L Units Industrial Commercial V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 0.9 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 0.9 V |
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