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EP3SL70 Datasheet(PDF) 219 Page - Altera Corporation |
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EP3SL70 Datasheet(HTML) 219 Page - Altera Corporation |
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219 / 341 page  Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics 1–209 I/O Timing © July 2010 Altera Corporation Stratix III Device Handbook, Volume 2 3.0-V LVCMOS 4mA GCLK t co 3.146 3.146 4.397 4.757 5.259 5.140 5.275 4.757 5.259 5.140 5.275 ns GCLK PLL t co 3.428 3.402 4.774 5.197 5.683 5.539 5.836 5.197 5.683 5.539 5.836 ns 8mA GCLK tco 3.009 3.010 4.202 4.558 5.077 4.958 5.165 4.558 5.077 4.958 5.165 ns GCLK PLL t co 3.349 3.323 4.651 5.068 5.548 5.404 5.701 5.068 5.548 5.404 5.701 ns 12mA GCLK t co 2.995 3.005 4.183 4.524 5.009 4.889 5.134 4.524 5.009 4.889 5.134 ns GCLK PLL t co 3.344 3.318 4.643 5.061 5.540 5.395 5.694 5.061 5.540 5.395 5.694 ns 16mA GCLK t co 2.986 2.996 4.169 4.509 5.007 4.888 5.139 4.509 5.007 4.888 5.139 ns GCLK PLL t co 3.335 3.309 4.629 5.046 5.525 5.380 5.679 5.046 5.525 5.380 5.679 ns 2.5 V 4mA GCLK t co 3.293 3.293 4.651 5.036 5.541 5.422 5.483 5.036 5.541 5.422 5.483 ns GCLK PLL t co 3.550 3.524 4.981 5.424 5.930 5.786 6.084 5.424 5.930 5.786 6.084 ns 8mA GCLK tco 3.168 3.168 4.478 4.852 5.344 5.225 5.359 4.852 5.344 5.225 5.359 ns GCLK PLL t co 3.450 3.424 4.862 5.298 5.798 5.654 5.951 5.298 5.798 5.654 5.951 ns 12mA GCLK t co 3.068 3.068 4.349 4.716 5.204 5.085 5.281 4.716 5.204 5.085 5.281 ns GCLK PLL t co 3.406 3.380 4.775 5.208 5.703 5.558 5.857 5.208 5.703 5.558 5.857 ns 16mA GCLK t co 3.041 3.041 4.280 4.649 5.154 5.035 5.224 4.649 5.154 5.035 5.224 ns GCLK PLL t co 3.368 3.342 4.736 5.165 5.660 5.515 5.814 5.165 5.660 5.515 5.814 ns 1.8 V 2mA GCLK t co 3.556 3.556 5.088 5.519 6.078 5.958 5.880 5.519 6.078 5.958 5.880 ns GCLK PLL t co 3.741 3.715 5.303 5.784 6.335 6.190 6.489 5.784 6.335 6.190 6.489 ns 4mA GCLK tco 3.315 3.315 4.728 5.113 5.617 5.498 5.549 5.113 5.617 5.498 5.549 ns GCLK PLL t co 3.560 3.534 5.024 5.475 5.987 5.843 6.140 5.475 5.987 5.843 6.140 ns 6mA GCLK t co 3.197 3.197 4.538 4.923 5.443 5.323 5.437 4.923 5.443 5.323 5.437 ns GCLK PLL t co 3.478 3.452 4.917 5.360 5.877 5.732 6.031 5.360 5.877 5.732 6.031 ns 8mA GCLK t co 3.143 3.143 4.438 4.825 5.331 5.211 5.360 4.825 5.331 5.211 5.360 ns GCLK PLL tco 3.458 3.432 4.858 5.307 5.811 5.666 5.965 5.307 5.811 5.666 5.965 ns 10mA GCLK t co 3.075 3.075 4.342 4.727 5.217 5.097 5.291 4.727 5.217 5.097 5.291 ns GCLK PLL t co 3.395 3.369 4.797 5.232 5.730 5.585 5.884 5.232 5.730 5.585 5.884 ns 12mA GCLK tco 3.051 3.051 4.317 4.680 5.179 5.059 5.258 4.680 5.179 5.059 5.258 ns GCLK PLL t co 3.377 3.351 4.777 5.210 5.707 5.562 5.861 5.210 5.707 5.562 5.861 ns Table 1–103. EP3SE50 Column Pins Output Timing Parameters (Part 2 of 6) I/O Standard Clock Fast Model C2 C3 C4 C4L I3 I4 I4L Units Industrial Commercial V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 0.9 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 0.9 V |
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