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AD9681 Datasheet(PDF) 31 Page - Analog Devices |
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AD9681 Datasheet(HTML) 31 Page - Analog Devices |
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31 / 40 page ![]() Data Sheet AD9681 Rev. A | Page 31 of 40 MEMORY MAP The AD9681 uses a 3-wire (bidirectional SDIO) interface and 16-bit addressing. Therefore, Bit 0 and Bit 7 in Register 0x00 are set to 0, and Bit 3 and Bit 4 are set to 1. When Bit 5 in Register 0x00 is set high, the SPI enters a soft reset where all of the user registers revert to their default values and Bit 2 is automatically cleared. Table 17. Memory Map Register Table Reg. Addr. (Hex) Register Name Bit 7 (MSB) Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 (LSB) Default Value (Hex) Comments Chip Configuration Registers 0x00 SPI port configuration 0 = SDIO active LSB first Soft reset 1 = 16-bit address 1 = 16-bit address Soft reset LSB first 0 = SDIO active 0x18 Nibbles are mirrored such that a given register value yields the same function for either LSB-first mode or MSB- first mode. The default for ADCs is 16-bit mode. 0x01 Chip ID (global) 8-bit chip ID, Bits[7:0]; 0x8F = the AD9681, an octal, 14-bit, 125 MSPS serial LVDS 0x8F Unique chip ID used to differ- entiate devices. Read only. 0x02 Chip grade (global) Open Speed grade ID, Bits[6:4]; 110 = 125 MSPS Open Open Open Open Read only Unique speed grade ID used to differentiate graded devices. Read only. Device Index and Transfer Registers 0x05 Device index Open Open DCO±1, DCO±2 clock channels FCO±1, FCO±2 clock channels D1, D2 data channels C1, C2 data channels B1, B2 data channels A1, A2 data channels 0x3F Bits are set to determine which device on chip receives the next write command. The default is all devices on chip. 0xFF Transfer Open Open Open Open Open Open Open Initiate override 0x00 Sets resolution/ sample rate override. Global ADC Function Registers 0x08 Power modes (global) Open Open External power- down pin function; 0 = full power- down, 1 = standby Open Open Open Internal power-down mode, Bits[1:0]; 00 = chip run 01 = full power-down 10 = standby 11 = digital reset 0x00 Determines various generic modes of chip operation. 0x09 Clock (global) Open Open Open Open Open Open Open Duty cycle stabilizer; 0 = off 1 = on 0x01 Turns duty cycle stabilizer on or off. 0x0B Clock divide (global) Open Open Open Open Open Clock divide ratio, Bits[2:0]; 000 = divide by 1 001 = divide by 2 010 = divide by 3 011 = divide by 4 100 = divide by 5 101 = divide by 6 110 = divide by 7 111 = divide by 8 0x00 Divide ratio is the value plus 1. |
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