AD9681 datasheet(33/40 Pages) AD

33 / 40 page

Data Sheet

AD9681

Rev. A | Page 33 of 40

Reg.

Addr.

(Hex)

Bit 7

(MSB)

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

(LSB)

Default

Value

(Hex)

Comments

0x21

Serial output data

control (global)

LVDS

output

LSB first

SDR/DDR one-lane/two-lane,

wordwise/bitwise/bytewise, Bits[6:4];

000 = SDR two-lane, bitwise

001 = SDR two-lane, bytewise

010 = DDR two-lane, bitwise

011 = DDR two-lane, bytewise

100 = DDR one-lane, wordwise

PLL low

encode

rate

mode

Select 2×

frame

Serial output number

of bits, Bits[1:0];

00 = 16 bits

10 = 12 bits

0x30

Serial stream

control. Default

causes MSB

first and the

native bit

stream.

0x22

Serial channel

status (local)

Open

Channel

output

reset

Channel

power-

down

0x00

Powers down

individual

sections of a

converter.

0x100

Resolution/sample

rate override

Open

Resolution/

sample rate

override

enable

Resolution, Bits[5:4];

01 = 14 bits

10 = 12 bits

Open

Sample rate, Bits[2:0];

000 = 20 MSPS

001 = 40 MSPS

010 = 50 MSPS

011 = 65 MSPS

100 = 80 MSPS

101 = 105 MSPS

110 = 125 MSPS

0x00

Resolution/

sample rate

override

(requires

transfer

0x101

User I/O Control 2

Open

SDIO

pull-

down

0x00

Disables SDIO

pull-down.

0x102

User I/O Control 3

Open

VCM

power-

down

Open

0x00

VCM control.

0x109

Sync

Open

Sync next

only

Enable

sync

0x00

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