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AS3911 Datasheet(PDF) 15 Page - ams AG |
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AS3911 Datasheet(HTML) 15 Page - ams AG |
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15 / 149 page ![]() ams Datasheet, Confidential: 2013-Oct [2-03] AS3911 – 15 Detaile d Desc rip t ion digital blocks, there is also a separate one for the antenna drivers. In case of low cost applications some (or all) regulators may not be used to save on external components. This block additionally generates a reference voltage for the analog processing (AGD - analog ground). This voltage also has an associated external buffer capacitor. POR and Bias This block contains the bias current and voltage generator which provides bias currents and reference voltages to all other blocks. It also incorporates a Power on Reset (POR) circuit which provides a reset at power-up and at low supply levels. RC Oscillator and Wake-up Timer The AS3911 includes several possibilities of low power detection of a card presence (capacitive sensor, phase measurement, amplitude measurement). RC oscillator and register configurable Wake-up timer are used to schedule periodic detection. When presence of a card is detected an interrupt is sent to controller. ISO14443 and NFCIP-1 Framing This block performs framing for receive and transmit according to the selected ISO mode and bit rate settings. In reception it takes demodulated sub-carrier signal from Receiver. It recognizes the SOF, EOF and data bits, performs parity and CRC check, organizes the received data in bytes and places them in the FIFO. During transmit, it operates inversely, it takes bytes from FIFO, generates parity and CRC bits, adds SOF and EOF and performs final encoding before passing modulation signal to transmitter. In Transparent mode, the framing and FIFO are bypassed, the digitized sub-carrier signal, which is Receiver output, is directly sent to MISO pin, signal applied to MOSI pin is directly used to modulate the transmitter. FIFO The AS3911 contains a 96 byte FIFO. Depending on the mode, it contains either data which has been received or data which is to be transmitted. Control Logic The control logic contains I/O registers which define operation of device. |
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