| Electronic Components Datasheet Search |
|
AS3911 Datasheet(PDF) 44 Page - ams AG |
|
|
|||||||||||||||||||||||||||||
AS3911 Datasheet(HTML) 44 Page - ams AG |
|
44 / 149 page ![]() AS3911 – 44 ams Datasheet, Confidential: 2013-Oct [2-03] A p pl i c at io n I n f o r m at i o n SPI Timing Figure 30: SPI Timing Figure 31: SPI General Timing Symbol Parameter Min Typ Max Unit Notes General Timing (VDD = VDD_IO = VDD_D = 3.3 V, Temperature 25°C) TSCLK SCLK period 100 ns TSCLK=TSCLKL+TSCLKH, use of shorter SCLK period may lead to incorrect operation of FIFO TSCLKL SCLK low 40 ns TSCLKH SCLK high 40 ns TSSH SPI reset (/SS high) 100 ns TNCSL /SS falling to SCLK rising 25 ns First SCLK pulse TNCSH SCLK falling to /SS rising 25 (tbd) ns Last SCLK pulse TDIS Data in setup time 10 ns TDIH Data in hold time 10 ns Read Timing (VDD = VDD_IO = VDD_D = 3.3 V, Temperature 25°C, CLOAD ≤50 pF) TDOD Data out delay 20 ns TDOHZ Data out to high impedance delay 20 ns ... ... ... DATAI DATAI DATAI ... tSCLKH tNCSL tSCLKL tDIS tDIH tNCSH /SS MOSI MISO SCLK |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |