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AFE032 Datasheet(PDF) 19 Page - Texas Instruments

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Part # AFE032
Description  Power-Line Communications Analog Front-End
PDF  77 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

AFE032 Datasheet(HTML) 19 Page - Texas Instruments

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Programmable
Filter
DAC
Digital Interface
(SPI)
SCLK
DIN
DOUT
CS
TX PGA
Power Amplifier
TX_F_OUT
TX_PGA_IN
DAC_OUT
XCLK
PA_IN
PA_OUT2
PA_OUT1
1 k:
1 k:
ZIN
17 k:
ZF
CDAC
CIN
HP
IN
f
k
C
u
:
u
u
18
2
1
S
Inside the Device
I
=
LIM
1.2 V
16.320 kW
´
R
+ R
INT
SET
AFE032
www.ti.com
SBOS669A – AUGUST 2013 – REVISED DECEMBER 2013
PA Current Limiting
The PA_ISET pin (pin 26) provides a resistor-programmable output current limit for the PA block. Equation 2
determines the value of the external RSET resistor attached to this pin.
where:
•
RSET = the value of the external resistor connected between pin 26 and ground,
•
RINT = the value of the internal resistor as programmed by the SPI interface in Table 18 (bits 4 and 5), and
•
Ilim = the value of the desired current limit for the PA.
(2)
RINT bit setting for bits 4 and 5 in Table 18 are listed in Table 1.
Table 1. RINT Bit Settings
BIT SETTING
RINT VALUE
00
17 k
Ω
01
11 k
Ω
10
8 k
Ω
11
1.2 k
Ω
Note that there is a 30% tolerance on the Ilim value given by Equation 2.
Tx Block
The Tx block consists of the Tx PGA and Tx filter.
The Tx PGA is a low-noise, high-performance, programmable gain amplifier. In DAC mode [where the DAC pin,
pin 7, is a logic '1' and Tx enable (bit 4 in the REG_RX/TX_CTL register) is a logic '1'], the Tx PGA operates as
the internal digital-to-analog converter (DAC) output buffer with programmable gain. The Tx PGA gain is
programmed through the serial interface. The Tx PGA gain settings are 1.15 V/V, 2.3 V/V, 3.25 V/V, and 4.6 V/V.
Gain is selectable via the TX_PGA gain pins (bits 2 to 0 in the REG_RX/TX_CTL register).
The Tx filter is a unity-gain, fourth-order, low-pass filter. The Tx filter cutoff frequency is selectable between the
CENELEC (bands A, B, C, or D), ARIB, or FCC modes. The LPF band select bits (bits 6 to 4 in the
REG_HPF/LPF_CFG register) determine the cutoff frequency.
When in DAC mode, the device accepts serial data from the microprocessor and writes that data to the internal
DAC registers.
Proper connections for the Tx signal path for DAC mode operation are shown in Figure 14.
(1) For the capacitor value of CIN, fHP is the desired lower cutoff frequency and 17 kΩ is the PA input resistance.
Figure 14. Recommended Tx Signal Chain Connections
Copyright © 2013, Texas Instruments Incorporated
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