AFE032 datasheet(39/77 Pages) TI1

39 / 77 page

AFE032

www.ti.com

SBOS669A – AUGUST 2013 – REVISED DECEMBER 2013

Table 14. REG_AFE032_CTL Register (Address = 00h)

Soft reset

Sticky reset

Reserved

Bypass Block 4

Bypass Block 3

Bypass Block 2

Bypass Block 1

DAC SPI select

R0/W

R/W

LEGEND: R/W = read and write; R0/W = read '0' and write (these bits always reset to '0' after being written); R = read-only.

Bit 7

Soft reset

This bit creates a reset pulse to all AFE digital circuits and control registers. This bit is self resetting.

0 = Normal operation (default)

1 = Reset

Bit 6

Sticky reset

This bit resets all AFE digital circuits except the SPI registers. The SPI registers maintain all currently programmed

values. This bit is self resetting.

0 = Normal operation (default)

1 = Reset

Bit 5

Reserved

This bit is reserved.

Default = 0.

Bit 4

Bypass Block 4

This bit determines if block 4 is included in the signal path.

0 = Include block 4 (default)

1 = Bypass block 4

Bit 3

Bypass Block 3

This bit determines if block 3 is included in the signal path.

0 = Include block 3 (default)

1 = Bypass block 3

Bit 2

Bypass Block 2

This bit determines if block 2 is included in the signal path.

0 = Include block 2 (default)

1 = Bypass block 2

Bit 1

Bypass Block 1

This bit determines if block 1 is included in the signal path.

0 = Include block 1 (default)

1 = Bypass block 1

Bit 0

DAC SPI select

This bit sets the 12-bit DAC sample in either a 16-bit SCLK envelope or a 12-bit SCLK envelope.

0 = 12-bit DAC burst (default)

1 = 16-bit DAC burst

Submit Documentation Feedback

Product Folder Links: AFE032

AFE032 Datasheet(PDF) 39 Page - Texas Instruments

AFE032 Datasheet(HTML) 39 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77

Datasheet Download

Link URL