OPA2832 datasheet(27/37 Pages) NSC

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INPUT AND ESD PROTECTION

External

−V

Internal

Circuitry

OPA2832

www.ti.com ............................................................................................................................................. SBOS327C – FEBRUARY 2005 – REVISED AUGUST 2008

d) Connections to other wideband devices on the

Socketing

high-speed

part

not

board may be made with short direct traces or

recommended. The additional lead length and

through

onboard

transmission

lines.

For

short

pin-to-pin capacitance introduced by the socket can

connections, consider the trace and the input to the

create an extremely troublesome parasitic network

next device as a lumped capacitive load. Relatively

which can make it almost impossible to achieve a

wide traces (50mils to 100mils) should be used,

smooth, stable frequency response. Best results are

preferably with ground and power planes opened up

obtained by soldering the OPA2832 onto the board.

around them. Estimate the total capacitive load and

set

from

the

typical

characteristic

curve

Recommended RS vs Capacitive Load. Low parasitic

The OPA2832 is built using a very high-speed

capacitive loads (< 5pF) may not need an RS since

complementary bipolar process. The internal junction

the OPA2832 is nominally compensated to operate

breakdown voltages are relatively low for these very

with a 2pF parasitic load. Higher parasitic capacitive

small geometry devices. These breakdowns are

loads without an RS are allowed as the signal gain

reflected in the Absolute Maximum Ratings table. All

increases (increasing the unloaded phase margin). If

device pins are protected with internal ESD protection

a long trace is required, and the 6dB signal loss

diodes to the power supplies, as shown in Figure 72.

intrinsic to a doubly-terminated transmission line is

acceptable,

implement

matched

impedance

transmission

line

using

microstrip

stripline

techniques (consult an ECL design handbook for

microstrip and stripline layout techniques). A 50

Ω

environment is normally not necessary onboard, and

in fact, a higher impedance environment will improve

distortion as shown in the distortion versus load plots.

With a characteristic board trace impedance defined

(based on board material and trace dimensions), a

matching series resistor into the trace from the output

of the OPA2832 is used as well as a terminating

Figure 72. Internal ESD Protection

shunt resistor at the input of the destination device.

Remember also that the terminating impedance will

These diodes provide moderate protection to input

be the parallel combination of the shunt resistor and

overdrive voltages above the supplies as well. The

the input impedance of the destination device; this

protection

diodes

can

typically

support

30mA

total effective impedance should be set to match the

continuous

current.

Where

higher

currents

are

trace

impedance.

the

6dB

attenuation

possible (that is, in systems with ±15V supply parts

doubly-terminated transmission line is unacceptable,

driving into the OPA2832), current-limiting series

a long trace can be series-terminated at the source

resistors should be added into the two inputs. Keep

end only. Treat the trace as a capacitive load in this

these resistor values as low as possible, since high

case and set the series resistor value as shown in the

values

degrade

both

noise

performance

and

typical characteristic curve Recommended RS vs

frequency response.

Capacitive Load. This will not preserve signal integrity

as well as a doubly-terminated line. If the input

impedance of the destination device is low, there will

be some signal attenuation due to the voltage divider

formed by the series output into the terminating

impedance.

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