ARM920T datasheet(32/350 Pages) ATMEL

32 / 350 page

Programmer’s Model

2-6

ARM DDI 0151C

2.3.1

Addresses in ARM920T

Three distinct types of address exist in an ARM920T system:

•

Virtual Address (VA)

•

Modified Virtual Address (MVA)

•

Physical Address (PA).

Below is an example of the address manipulation when the ARM9TDMI core requests

an instruction (see Figure 2-10 on page 2-25).

The Instruction VA (IVA) is issued by the ARM9TDMI core.

This is translated by the ProcID to the Instruction MVA (IMVA). It is the IMVA

that the Instruction Cache (ICache) and MMU see.

If the protection check carried out by the IMMU on the IMVA does not abort, and

the IMVA tag is in the ICache, the instruction data is returned to the ARM9TDMI

core.

If the ICache misses (the IMVA tag is not in the ICache), then the IMMU

performs a translation to produce the Instruction PA (IPA). This address is given

to the AMBA bus interface to perform an external access.

2.3.2

Accessing CP15 registers

The terms and abbreviations shown in Table 2-4 are used throughout this section.

Table 2-3 Address types in ARM920T

Domain

ARM9TDMI

Caches and TLBs

AMBA bus

Address

Virtual (VA)

Modified Virtual (MVA)

Physical (PA)

Table 2-4 CP15 abbreviations

Term

Abbreviation

Description

Unpredictable

UNP

For reads, the data returned when reading from this

location is unpredictable. It can have any value.

For writes, writing to this location causes unpredictable

behavior, or an unpredictable change in device

configuration.

Should be zero

SBZ

When writing to this location, all bits of this field should

be 0.

ARM920T Datasheet(PDF) 32 Page - ATMEL Corporation

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