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ARM920T Datasheet(PDF) 53 Page - ATMEL Corporation |
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ARM920T Datasheet(HTML) 53 Page - ATMEL Corporation |
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53 / 350 page ![]() ARM DDI 0151C Copyright © 2000, 2001 ARM Limited. All rights reserved. 3-1 Chapter 3 Memory Management Unit This chapter describes the Memory Management Unit (MMU). It contains the following sections: • About the MMU on page 3-2 • MMU program accessible registers on page 3-4 • Address translation on page 3-6 • MMU faults and CPU aborts on page 3-21 • Fault address and fault status registers on page 3-22 • Domain access control on page 3-23 • Fault checking sequence on page 3-25 • External aborts on page 3-28 • Interaction of the MMU and caches on page 3-29. |
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