UPC1830 datasheet(18/44 Pages) NEC

18 / 44 page

µPC1830

(5) G-Y demodulation circuit

Demodulates G-Y using (R-Y)’, (B-Y)’ which is color difference signal after tint adjustment and the following

expression.

G-Y demodulation expression: (G-Y) = –0.51

× (R-Y)’ – 0.19 × (B-Y)’

(6) RGB matrix circuit

Adds a brightness signal: Y to each of (R-Y)’, (B-Y)’ and G-Y to create R, G, and B signals.

5.4 Synchronizing Signal Processing Section

(1) Input signal

A composite video signal or brightness signal is input to the synchronizing separate input pin (pin 39) at 1 VP-P.

(2) Sync. separation circuit

Separates the sync. signal from a composite video signal. The slice level can be changed using an external resistor:

RX (see Figure 5-6, TYP. = 220

Ω).

The operation of the

µPC1830 sync. separation circuit is explained below.

Figure 5-6 is an equivalent circuit diagram of the

µPC1830 sync. separation circuit.

Figure 5-6.

µPC1830 Sync. Separate Input Section Equivalent Circuit

In Figure 5-6, the slice level of sync. separation is determined as follows:

When a negative sync. video signal is input, charge current ISP flows from the

µPC1830 to CO so that the

synchronization peak (minimum potential) becomes approximately 2.5 V. The voltage of the sync. separate

input pin (pin 39) becomes 2.5 V or higher during a period other than the synchronization peak (minimum

potential), thus cutting off transistor TR1 (reducing the collector current of TR1). Consequently, a charge in CO

is discharged via RO and RX by current IX during this cut-off period. Figure 5-7 illustrates this situation.

Approx. 2.5 V

(when VCC = 5 V)

VCC

5 k

Ω

16 k

Ω

100

Ω

167

Ω

5 k

Ω

5 k

Ω

1.8 k

Ω

A733

Isp

VCC

TR1

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