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PCM186X Datasheet(PDF) 63 Page - Texas Instruments |
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PCM186X Datasheet(HTML) 63 Page - Texas Instruments |
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63 / 115 page ![]() PCM186X AVDD DVDD IOVDD LDO 3.3V 1.8 V external PCM186X AVDD DVDD IOVDD LDO 3.3VA 1.8 V output 3.3VD PCM186X AVDD DVDD IOVDD LDO 3.3V 1.8 V output PCM1860, PCM1862, PCM1864, PCM1864-Q1 www.ti.com SLASE55A – NOVEMBER 2014 – REVISED DECEMBER 2014 Power Connection Examples (continued) Figure 64. 3.3 V for All supplies Figure 65. Separate 3.3 V for AVDD and DVDD 12.6.2 3.3V AVDD, DVDD With a 1.8V IOVDD for Lower-Power Applications The PCM186x also supports interfacing to lower power 1.8 V processors. In the presence of an external 1.8 V connected to LDO, the internal LDO that takes DVDD (3.3 V) and converts it to the 1.8 V core voltage is bypassed. Under such conditions, IOVDD will then be used as the 1.8 V source for the digital core of the device. In such systems, it is still important to have 3.3 V for DVDD, as specific sections of the digital core in the device run from 3.3 V. Figure 66. 1.8V IOVDD with 3.3 V for AVDD and DVDD 12.7 Fade In This is the final stage of the Power Up Sequence. Once the PLL has locked, The ADC will start running, and the data will follow the Fade-IN sequence according to the following steps: 1. Detect a zero crossing audio input. 2. Increment the volume towards 0 dB with S-shaped volume. 3. Repeat from (1) until arrive at the 0 dB. The number of steps from mute to 0dB is 48 steps. 4. If zero crossing does not occur for 8192 sample times (= time out), change the volume per sample time. Copyright © 2014, Texas Instruments Incorporated Submit Documentation Feedback 63 Product Folder Links: PCM1860 PCM1862 PCM1864 PCM1864-Q1 |
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