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PCM186X Datasheet(PDF) 73 Page - Texas Instruments |
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PCM186X Datasheet(HTML) 73 Page - Texas Instruments |
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73 / 115 page ![]() PCM1860, PCM1862, PCM1864, PCM1864-Q1 www.ti.com SLASE55A – NOVEMBER 2014 – REVISED DECEMBER 2014 00_1010: VINL4[SE] + VINL2[SE] 00_1011: VINL4[SE] + VINL2[SE] + VINL1[SE] 00_1100: VINL4[SE] + VINL3[SE] 00_1101: VINL4[SE] + VINL3[SE] + VINL1[SE] 00_1110: VINL4[SE] + VINL3[SE] + VINL2[SE] 00_1111: VINL4[SE] + VINL3[SE] + VINL2[SE] + VINL1[SE] 01_0000: {VIN1P, VIN1M}[DIFF] 10_0000: {VIN4P, VIN4M}[DIFF] 11_0000: {VIN1P, VIN1M}[DIFF] + {VIN4P, VIN4M}[DIFF] Page 0 / Register 7 (Hex 0x07) Dec Hex b7 b6 b5 b4 b3 b2 b1 b0 7 0x07 POL RSV SEL_R5 SEL_R4 SEL_R3 SEL_R2 SEL_R1 SEL_R0 Reset Value 0 1 0 0 0 0 0 1 RSV Reserved Reserved. Do not access. POL ADC1_INPUT_SEL_R - Change signal polarity Default value: 0 0: Normal (Default) 1: Inverted SEL_R[5:0] ADC Input Channel Select (ADC1R) Default value: 000001 00_0000: No Select 00_0001: VINR1[SE] (Default) 00_0010: VINR2[SE] 00_0011: VINR2[SE] + VINR1[SE] 00_0100: VINR3[SE] 00_0101: VINR3[SE] + VINR1[SE] 00_0110: VINR3[SE] + VINR2[SE] 00_0111: VINR3[SE] + VINR2[SE] + VINR1[SE] 00_1000: VINR4[SE] 00_1001: VINR4[SE] + VINR1[SE] 00_1010: VINR4[SE] + VINR2[SE] 00_1011: VINR4[SE] + VINR2[SE] + VINR1[SE] 00_1100: VINR4[SE] + VINR3[SE] 00_1101: VINR4[SE] + VINR3[SE] + VINR1[SE] 00_1110: VINR4[SE] + VINR3[SE] + VINR2[SE] 00_1111: VINR4[SE] + VINR3[SE] + VINR2[SE] + VINR1[SE] 01_0000: {VIN2P, VIN2M}[DIFF] 10_0000: {VIN3P, VIN3M}[DIFF] 11_0000: {VIN2P, VIN2M}[DIFF] + {VIN3P, VIN3M}[DIFF] Page 0 / Register 8 (Hex 0x08) Dec Hex b7 b6 b5 b4 b3 b2 b1 b0 8 0x08 POL RSV SEL_L5 SEL_L4 SEL_L3 SEL_L2 SEL_L1 SEL_L0 Reset Value 0 1 0 0 0 0 1 0 Copyright © 2014, Texas Instruments Incorporated Submit Documentation Feedback 73 Product Folder Links: PCM1860 PCM1862 PCM1864 PCM1864-Q1 |
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