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UPD178024 Datasheet(PDF) 23 Page - NEC |
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UPD178024 Datasheet(HTML) 23 Page - NEC |
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23 / 56 page  23 µPD178023, 178024 Data Sheet U14126EJ1V0DS00 3.5 A/D Converter An A/D converter with a resolution of 8 bits × 6 channels is provided. Figure 3-7. Block Diagram of A/D Converter ANI0/P10 ANI1/P11 ANI2/P12 ANI3/P13 ANI4/P14 ANI5/P15 Sample & hold circuit Voltage comparator Voltage comparator Successive approximation register (SAR) A/D conversion result register 3 (ADCR3) Control circuit Control circuit VDD GND ADCS3 INTAD3 PFEN3 ADCS3 ADS33 ADS32 ADS31 ADS30 0 FR32 FR31 FR30 0 0 0 PFCM3 PFHRM3 Power-fail comparison mode register 3 (PFM3) A/D converter mode register 3 (ADM3) Analog input channel specification register 3 (ADS3) 4 Internal bus Power-fail comparison threshold value register 3 (PFT3) |
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