AN2620

Application information component selection

Doc ID 13883 Rev 3

5/20

drawback is that, considering a requested ripple current rating, they are physically

larger than other capacitors.

●

Ceramic capacitors. If available for the requested value and voltage rating, these

capacitors usually have a higher RMS current rating for a given physical dimension

(due to the very low ESR). The drawback is the quite high cost.

●

Tantalum capacitor. Very good tantalum capacitors are becoming available, with very

low ESR and small size. The only problem is that they occasionally can burn if

subjected to very high current during the charge. So, it is better to avoid this type of

capacitor for the input filter of the device. In fact, they can be subjected to high surge

current when connected to the power supply.

1.2

Output capacitor

The output capacitor is very important in satisfying the output voltage ripple requirement.

Using a small inductor value to reduce the size of the choke is useful, but increases the

current ripple. So, to reduce the output voltage ripple, a low ESR capacitor is required.

The most important parameters for the output capacitor are the capacitance, the ESR and

the voltage rating.

The capacitance and the ESR affect the control loop stability, the output ripple voltage, and

transient response of the regulator. The ripple due to the capacitance can be calculated by

the following formula:

Equation 4

current that can be calculated as:

Equation 5

where D is the duty cycle while the ripple due to the ESR is given by:

Equation 6

Use the above equations to define capacitor selection range, but final values should be

verified by testing an evaluation circuit.

Lower ESR ceramic capacitors are usually advisable to reduce the output ripple voltage.

Capacitors with higher voltage ratings have lower ESR values, providing lower output ripple

voltage.

Also the capacitor ESL value impacts the output ripple voltage, but ceramic capacitors

usually have very low ESL, making ripple voltages due to the ESL negligible. In order to

reduce ripple voltages due to a parasitic inductive effect, keep the output capacitor

connection paths as short as possible.

V

ripple C

()

0.125

ΔI

SW

⋅

F

S

C

out

⋅

---------------------------------

=

ΔI

SW

V

in

V

out

–

()

F

S

L

⋅

------------------------------ D

⋅

=

V

ripple ESR

()

I

Sw

Δ

ESR

⋅

=