AN2738 datasheet(28/54 Pages) STMICROELECTRONICS

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Application example

AN2738

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Doc ID 14589 Rev 2

current is entering the bridge. This type of transition is called “hard” because the power

switch turns on when the related VCE (VDS) is at maximum; VCE (VDS) goes back to

maximum during turn-off (VCE is close to zero while the switch is steadily ON). The transition

is completely managed by the switch that, during the commutation, dissipates some energy.

On the other hand, if the switch turns on when its VCE is already closed to zero or VCE

remains close to zero after turn-off, the transition is soft and, during the commutation, the

switch dissipates almost no energy. This last condition happens when the free-wheeling

diode of the switch is bringing the current because the diode is in the same direction of the

load current. As a general rule, consider that the dynamic of the transition (dVOUT/dt, VCE

rise/fall time etc.) is always managed and controlled by the power switch in hard switching,

while its companion switch is necessarily in soft switching because it is in the opposite

direction of the load current. Considering this, in order to understand the power IGBT

(MOSFET) transition, the hard switching transition will be further investigated. Note that all

of the descriptions that follow consider an inductive load connected to the half-bridge stage

output.

In Figure 26, the dynamics of the hard switching for the turn-on transition are described. The

first graph is related to the gate charge curves of the power IGBTs (or MOSFETs). This is a

typical graph which is also available in the datasheets for the IGBT or MOSFET and

describes the dependence of the amount of charge required by the IGBT gate on the

voltage drop between the gate and the emitter (or source). In the second graph the collector

current (IC) and VCE voltage versus time are shown. The third graph shows the working

point of the IGBT traced on the various Ic vs. VCE characteristic curves for different VGE

voltages. For a single turn-on transition, four main phases related to the power IGBT

(MOSFET) commutation can be distinguished. On the left side of Figure 26, the IGBT

conditions for each phase are described. During phase T1 the gate begins to be charged,

but the power IGBT still is not conducting because VGE is below the threshold of the IGBT. In

this state, the IGBT current is zero and its VCE is at maximum, while VGE is gradually

increasing. In phase T2 the VGE voltage goes above to the IGBT threshold and the IGBT

starts to bring part of the load current. VCE remains fixed at maximum level because the

free-wheeling diode of the companion IGBT is still bringing the rest of the load current and is

still conducting, thereby clamping the VCE voltage. Both in T1 and T2 phases, the gate

current contributes to charge the equivalent VGE parasitic capacitance of the IGBT. In the Ic

vs. VCE characteristic plot the T2 phase is the vertical section of the working curve trace,

because the IGBT is moving on its own characteristic with a constant VCE and an increasing

current, while its VGE is increasing also. When the amount of current flowing in the IGBT is

equal to the load current, the diode turns off and the VCE voltage starts to decrease because

it is no longer clamped by the free-wheeling diode of the other IGBT. The working point on Ic

vs. VCE curve reaches the load value and starts to move horizontally on the Ic constant

curve in the direction of decreasing VCE voltages. This is the T3 phase, usually called the

“plateau” phase. This name derives from the fact that the gate charge curve is horizontal for

the entire T3 phase, until VCE reaches the VCE_sat value corresponding to the load current.

Note that the VGE voltage is constant, although the gate current flowing in the IGBT gate is

not zero. The reason for this is that the whole gate current is used to charge the CGC (Miller)

parasitic capacitance which then experiences a dV/dt on its terminals because the VCE

voltage is decreasing after the diode turn-off. As a first approximation, if CGC was constant

(currently it is not), the dVOUT/dt could be calculated as follows:

Equation 5

OUT

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FALL

SOURCE

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