AN2738 datasheet(40/54 Pages) STMICROELECTRONICS

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The below-ground voltage on the OUT pin

AN2738

40/54

Doc ID 14589 Rev 2

The overall below-ground voltage on the OUT pin can be calculated as follows:

Equation 15

Equation 16

where:

●

VFPK is the free-wheeling diode transient peak forward voltage, which depends mainly

on the device technology and on the dIF/dt of the current in the diode. Typical values

could be from a few volts to more than 10 V. In Figure 36, VFP vs. dIF/dt of the

STTH1L06 diode is shown.

●

the dIF/dt is the current slope in the low side IGBT/MOSFET and could have a value

from a few tens to several hundreds of A/µs. The value depends mainly on the power

switch characteristics and in part on the driving current.

●

LPARASITIC represents the sum of all parasitic inductances on the current path and

mainly depends on the PCB layout. Generally, during the design of the power

application it is important to pay attention to the layout of the power bridges in order to

limit this parameter. Typical values of a good layout are in the order of some tens of nH.

Note that it is useful also to use RSENSE resistors with low parasitic inductances for the

same reason.

●

RSENSE * ILOAD product is the value of the VSENSE voltage and typically is less than 1 V,

also for thermal dissipation issues on the same resistor.

●

VF is the forward voltage of the free-wheeling diode and it is usually less than 2 V.

11.2

How to reduce the below ground spike voltage

In order to reduce the below ground spike, the following action should be taken:

●

Reduce the parasitic inductances (see Figure 35).

●

Reduce the dIF/dt by slowing down the turn-off of the high side IGBT/MOSFET.

In most of application the two previous strategies result to be enough to reduce properly the

below ground spike voltage, increasing the robustness of power system and then the margin

for safe operation of the application. On the other hand in some cases, where the below

ground spike voltage is significantly higher, the above suggestions may be not sufficient to

limit that value and then it could be useful to add some external components to improve

further the noise robustness of the power stage section:

●

Add a small resistor (2÷10

Ω typically) in series to the OUT line (see Figure 37). The

series resistor has the positive effect of limiting the spike voltage on the BOOT pin,

thanks to the filtering effect of such resistor coupled with the bootstrap capacitor. Note

that, in order to obtain an effective filtering effect, the OUT resistor must be placed

between the minus terminal of bootstrap capacitor and the output of the power stage,

as indicated in Figure 37.

OUTmin

⊥static

SENSE

LOAD

⋅

()

–

contributi

static

min_

OUT

contributi

dynamic

PARASITIC

FPK

spike

BGV

⋅

AN2738 Datasheet(PDF) 40 Page - STMicroelectronics

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