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LT1683 Datasheet(PDF) 10 Page - Linear Technology |
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LT1683 Datasheet(HTML) 10 Page - Linear Technology |
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10 / 24 page ![]() 10 LT1683 1683f OPERATIO In noise sensitive applications switching regulators tend to be ruled out as a power supply option due to their propensity for generating unwanted noise. When switch- ing supplies are required due to efficiency or input/output constraints, great pains must be taken to work around the noise generated by a typical supply. These steps may include pre and post regulator filtering, precise synchro- nization of the power supply oscillator to an external clock, synchronizing the rest of the circuit to the power supply oscillator or halting power supply switching during noise sensitive operations. The LT1683 greatly simplifies the task of eliminating supply noise by enabling the design of an inherently low noise switching regulator power supply. The LT1683 is a fixed frequency, current mode switching regulator with unique circuitry to control the voltage and current slew rates of the output switches. Current mode control provides excellent AC and DC line regulation and simplifies loop compensation. Slew control capability provides much greater control over the power supply components that can create con- ducted and radiated electromagnetic interference. Com- pliance with EMI standards will be an easier task and will require fewer external filtering components. The LT1683 uses two external N-channel MOSFETs as the power switches. This allows the user to tailor the drive conditions to a wide range of voltages and currents. CURRENT MODE CONTROL Referring to the block diagram. A switching cycle begins with an oscillator discharge pulse, which resets the RS flip-flop, turning on one of the external MOSFET drivers. The switch current is sensed across the external sense resistor and the resulting voltage is amplified and com- pared to the output of the error amplifier (VC pin). The driver is turned off once the output of the current sense amplifier exceeds the voltage on the VC pin. In this way pulse by pulse current limit is achieved. The toggle flip- flop ensures that the two MOSFETs are enabled on alter- nate clock cycles. Internal slope compensation is provided to ensure stability under high duty cycle conditions. Output regulation is obtained using the error amp to set the switch current trip point. The error amp is a transconductance amplifier that integrates the difference between the feedback output voltage and an internal 1.25V reference. The output of the error amp adjusts the switch current trip point to provide the required load current at the desired regulated output voltage. This method of control- ling current rather than voltage provides faster input transient response, cycle-by-cycle current limiting for better output switch protection and greater ease in com- pensating the feedback loop. The VC pin is used for loop compensation and current limit adjustment. During nor- mal operation the VC voltage will be between 0.25V and 1.27V. An external clamp on VC or SS may be used for lowering the current limit. The negative voltage feedback amplifier allows for direct regulation of negative output voltages. The voltage on the NFB pin gets amplified by a gain of – 0.5 and driven on to the FB input, i.e., the NFB pin regulates to –2.5V while the amplifier output internally drives the FB pin to 1.25V as in normal operation. The negative feedback amplifier input impedance is 100k (typ) referred to ground. Soft-Start Control of the switch current during start up can be obtained by using the SS pin. An external capacitor from SS to ground is charged by an internal 9 µA current source. The voltage on VC cannot exceed the voltage on SS. Thus as the SS pin ramps up the VC voltage will be allowed to ramp up. This will then provide for a smooth increase in switch maximum current. SS will be discharged as a result of the CS voltage exceeding the short circuit threshold of approximately 0.22V. Slew Control Control of output voltage and current slew rates is achieved via two feedback loops. One loop controls the MOSFET drain dV/dt and the other loop controls the MOSFET dI/dt. The voltage slew rate uses an external capacitor between CAP A or CAP B and the respective MOSFET drain. These integrating caps close the voltage feedback loop. The external resistor RVSL sets the current for the integrator. |
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