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LT1683

1683f

MOSFET DRAIN

CAP A OR B

1683 F02

Figure 2

APPLICATIO S I FOR ATIO

This part creates a second higher frequency rolloff of

harmonics that inversely depends on the slew time, the

time that voltage or current spends between the off state

and on state. This time is adjustable through the choice of

the slew resistors, the external resistors to ground on the

RVSL and RCSL pins and the external components used for

the external voltage feedback capacitors CAV, CBV (from

CAP A or CAP B to their respective MOSFET drains) and the

sense resistor. Lower slew rates (longer slew times, lower

frequency for harmonics rolloff) is created with higher

values of RVSL, RCSL, CAV, CBV and the current sense

resistor

Setting the voltage and current slew rates should be done

empirically. The most practical way of determining these

components is to set CAV, CBV and the sense resistor

value. Then, start by making RVSL, RCSL each a 50k

resistor pot in series with 3.3k. Starting from the lowest

resistor setting (fast slew) adjust the pots until the noise

level meets your guidelines. Note that slower slewing

waveforms will dissipate more power so that efficiency

will drop. You can monitor this as you make your slew

adjustment by measuring input and output voltage and

their respective currents. Monitor the MOSFET tempera-

ture as slew rates are slowed. These components will heat

up as efficiency decreases.

Measuring noise should be done carefully. It is easy to

introduce noise by poor measurement techniques. Con-

sult AN70 for recommended measurement techniques.

Keeping probe ground leads very short is essential.

Usually it will be desirable to keep the voltage and current

slew resistors approximately the same. There are circum-

stances where a better optimization can be found by

adjusting each separately, but as these values are sepa-

rated further, a loss of independence of control may occur.

It is possible to use a single slew setting resistor. In this

case the RVSL and RCSL pins are tied together. A resistor

with a value of 1.8k to 34k (one half the individual resis-

tors) can then be tied from these pins to ground.

In general only the RCSL value will be available for adjust-

ment of current slew. The current slew time does also

depend on the current sense resistor but this resistor is

normally set with consideration of the maximum current

in the MOSFETs.

Setting the voltage slew also involves selection of the

capacitors CAV, CBV. The voltage slew time is proportional

to the output voltage swing (basically input voltage), the

external voltage feedback capacitor and the RVSL value.

Thus at higher input voltages smaller capacitors will be

used with lower RVSL values. For a starting point use

Table 2.

Table 2

INPUT VOLTAGE

CAPACITOR VALUE

< 25V

5pF

50V

2.5pF

100V

1pF

Smaller value capacitors can be made in two ways. The

first is simply combining two capacitors in series. The

equivalent capacitance is then (C1 • C2)/(C1 + C2).

The second method makes use of a capacitor divider. Care

should be taken that the voltage ratings of the capacitors

satisfy the full voltage swing (2x input voltage for push-

pull configurations) thus essentially the same rating as the

MOSFETs.

The equivalent slew capacitance for Figure 2 is (C1 • C2)/

(C1 + C2 + C3).

Positive Output Voltage Setting

Sensing of a positive output voltage is usually done using

a resistor divider from the output to the FB pin. The

positive input to the error amp is connected internally to a

1.25V bandgap reference. The FB pin will regulate to this

voltage.

Referring to Figure 3, R1 is determined by:

VOUT

125

=−

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